| /Zephyr-latest/tests/drivers/gpio/gpio_basic_api/dts/bindings/ |
| D | test-gpio-basic-api.yaml | 4 # SPDX-License-Identifier: Apache-2.0
9 tests/drivers/gpio/gpio_basic_api test in Zephyr.
11 compatible: "test-gpio-basic-api"
14 out-gpios:
15 type: phandle-array
18 Identity of a GPIO that will be configured as an output. This
19 must be on the same device as in-gpios, and physically
20 connected to in-gpios.
22 in-gpios:
23 type: phandle-array
[all …]
|
| /Zephyr-latest/dts/bindings/gpio/ |
| D | semtech,sx1509b.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: SX1509B GPIO node
8 include: [i2c-device.yaml, gpio-controller.yaml]
11 "#gpio-cells":
18 nint-gpios:
19 type: phandle-array
21 Connection for the NINT signal. This signal is active-low when
22 produced by sx1509b GPIO node.
24 init-out-low:
31 init-out-high:
[all …]
|
| D | renesas,rz-gpio.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Reneses RZ GPIO controller node.
7 gpio-consumer{
8 out-gpio = <&gpio8 2 (GPIO_PULL_UP);
15 - Using interrupt TINT10
16 - Set Pullup
19 compatible: "renesas,rz-gpio"
22 - name: base.yaml
23 property-allowlist:
24 - status
[all …]
|
| D | grove-header.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 GPIO pins exposing on Grove 4 pins headers.
10 1 SDA/TXD/B/OUT
11 - VCC
12 - GND
15 compatible: "grove-header"
17 include: [gpio-nexus.yaml, base.yaml]
|
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_gecko.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
19 #include <zephyr/drivers/gpio/gpio_utils.h>
38 /* Assumption for calculating gpio index:
39 * 1. Address space of the first GPIO port is the address space for GPIO port A
41 #define GET_GECKO_GPIO_INDEX(id) (DT_INST_REG_ADDR(id) - DT_REG_ADDR(DT_NODELABEL(gpioa))) \
46 * Macros to set the GPIO MODE registers
48 * See https://www.silabs.com/documents/public/reference-manuals/EFM32WG-RM.pdf
52 * @brief Create the value to set the GPIO MODEL register
55 * @return The value that can be set into the GPIO MODEL register.
[all …]
|
| D | gpio_esp32.c | 5 * SPDX-License-Identifier: Apache-2.0
10 /* Include esp-idf headers first to avoid redefining BIT() macro */
21 #include <zephyr/drivers/gpio.h>
22 #include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
33 #include <zephyr/drivers/gpio/gpio_utils.h>
39 #define out out.val macro
47 /* gpio structs in esp32c3 series are different from xtensa ones */
48 #define out out.data macro
56 /* gpio structs in esp32c6 are also different */
57 #define out out.out_data_orig macro
[all …]
|
| /Zephyr-latest/dts/bindings/spi/ |
| D | zephyr,spi-bitbang.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,spi-bitbang"
8 include: spi-controller.yaml
11 clk-gpios:
12 type: phandle-array
15 Clock gpio info
17 mosi-gpios:
18 type: phandle-array
20 MOSI gpio info. Output pin for Master Out Slave In.
23 miso-gpios:
[all …]
|
| D | raspberrypi,pico-spi-pio.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "raspberrypi,pico-spi-pio"
8 include: ["spi-controller.yaml", "raspberrypi,pico-pio-device.yaml", "reset-device.yaml"]
11 clk-gpios:
12 type: phandle-array
17 mosi-gpios:
18 type: phandle-array
20 Output pin for Master Out Slave In.
22 miso-gpios:
23 type: phandle-array
[all …]
|
| /Zephyr-latest/soc/silabs/common/ |
| D | soc_gpio.h | 3 * SPDX-License-Identifier: Apache-2.0
7 * @brief Silabs MCU family General Purpose Input Output (GPIO)
22 GPIO_Port_TypeDef port; /** GPIO port */
23 unsigned int pin; /** GPIO pin on the port */
25 unsigned int out; /** out register value */ member
|
| /Zephyr-latest/modules/nrf_wifi/bus/ |
| D | rpu_hw_if.c | 4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
76 return -1; in validate_addr_blk()
85 end_addr = start_addr + len - 1; in rpu_validate_addr()
97 LOG_ERR("Address validation failed - pls check memmory map and re-try"); in rpu_validate_addr()
98 return -1; in rpu_validate_addr()
103 return -1; in rpu_validate_addr()
106 cfg->qspi_slave_latency = (*hl_flag) ? rpu_7002_memmap[selected_blk][2] : 0; in rpu_validate_addr()
116 LOG_ERR("Host IRQ GPIO %s is not ready", host_irq_spec.port->name); in rpu_irq_config()
117 return -ENODEV; in rpu_irq_config()
[all …]
|
| /Zephyr-latest/samples/basic/button/ |
| D | README.rst | 1 .. zephyr:code-sample:: button
3 :relevant-api: gpio_interface
5 Handle GPIO inputs with interrupts.
10 A simple button demo showcasing the use of GPIO input with interrupts.
14 debouncing, check out :ref:`input` and :zephyr:code-sample:`input-dump`
20 The board hardware must have a push button connected via a GPIO pin. These are
23 The button must be configured using the ``sw0`` :ref:`devicetree <dt-guide>`
24 alias, usually in the :ref:`BOARD.dts file <devicetree-in-out-files>`. You will
27 .. code-block:: none
35 the same alias used by the :zephyr:code-sample:`blinky` sample. If this is provided, the LED
[all …]
|
| /Zephyr-latest/drivers/w1/ |
| D | w1_zephyr_gpio.c | 4 * SPDX-License-Identifier: Apache-2.0
10 * @brief 1-Wire Bus Master driver using Zephyr GPIO interface.
12 * This file contains the implementation of the 1-Wire Bus Master driver using
13 * the Zephyr GPIO interface. The driver is based on GPIO bit-banging and
14 * follows the timing specifications for 1-Wire communication.
21 * - w1_zephyr_serial.c: drivers/w1/w1_zephyr_serial.c
22 * - Analog Devices 1-Wire Communication Through Software:
23 * https://www.analog.com/en/resources/technical-articles/1wire-communication-through-software.html
26 #include <zephyr/drivers/gpio.h>
96 /** GPIO device used for 1-Wire communication */
[all …]
|
| /Zephyr-latest/boards/seco/stm32f3_seco_d23/ |
| D | stm32f3_seco_d23.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f3/stm32f302v(b-c)tx-pinctrl.dtsi>
12 model = "SECO SBC-3.5-PX30 board (STM32F302VCT6)";
13 compatible = "seco,stm32f3-d23";
17 zephyr,code-partition = &slot0_partition;
18 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
28 label = "LED-1";
32 label = "LED-2";
[all …]
|
| /Zephyr-latest/drivers/pinctrl/ |
| D | pinctrl_esp32.c | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Include esp-idf headers first to avoid redefining BIT() macro */
16 #define out out.val macro
21 /* gpio structs in esp32c3 series are different from xtensa ones */
22 #define out out.data macro
27 /* gpio structs in esp32c6 are also different */
28 #define out out.out_data_orig macro
46 * @brief Array containing each GPIO port address.
55 /** Number of GPIO ports. */
84 return -EINVAL; in esp32_pin_apply_config()
[all …]
|
| /Zephyr-latest/tests/drivers/gpio/gpio_basic_api/boards/ |
| D | neorv32.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "test-gpio-basic-api";
10 out-gpios = <&gpio 0 0>;
11 in-gpios = <&gpio 1 0>;
|
| D | hifive_unleashed.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "test-gpio-basic-api";
10 out-gpios = <&gpio0 0 0>; /* GPIO-A */
11 in-gpios = <&gpio0 1 0>; /* GPIO-B */
|
| D | npcx7m6fb_evb.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "test-gpio-basic-api";
10 out-gpios = <&gpioc 5 0>; /* GPIO header 2 */
11 in-gpios = <&gpioc 6 0>; /* GPIO header 3 */
|
| D | npcx9m6f_evb.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "test-gpio-basic-api";
10 out-gpios = <&gpioc 5 0>; /* GPIO header 2 */
11 in-gpios = <&gpioc 6 0>; /* GPIO header 3 */
|
| D | aw9523b_on_arduino_header.overlay | 8 aw9523_gpio: gpio {
9 compatible = "awinic,aw9523b-gpio";
10 gpio-controller;
11 #gpio-cells = <2>;
12 int-gpios = <&arduino_header 18 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
13 reset-gpios = <&arduino_header 19 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
20 compatible = "test-gpio-basic-api";
22 out-gpios = <&aw9523_gpio 8 0>;
23 in-gpios = <&aw9523_gpio 9 0>;
|
| D | quick_feather.overlay | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "test-gpio-basic-api";
10 out-gpios = <&gpio 2 0>; /* Header J8 - pin 6 */
11 in-gpios = <&gpio 0 0>; /* Header J8 - pin 10 */
|
| D | mr_canhubk3_wkpu.overlay | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h>
11 compatible = "test-gpio-basic-api";
13 out-gpios = <&gpioa_h 13 0>;
14 in-gpios = <&gpioa_h 14 NXP_S32_GPIO_INT_WKPU>;
|
| D | intel_ehl_crb.overlay | 4 * SPDX-License-Identifier: Apache-2.0
6 /* By default, EHL_CRB on SBL, SBL locks all gpio registeration configuration.
8 * GPIO Settings -> GPIO_GPP_B -> GPP_B04 -> GPIO Skip -> Disable
9 * GPIO Settings -> GPIO_GPP_B -> GPP_B04 -> PadMode -> GPIO control of the pad
10 * GPIO Settings -> GPIO_GPP_B -> GPP_B04 -> HostSoftPadOwn -> Host ownership to GPIO Driver mode
11 * GPIO Settings -> GPIO_GPP_B -> GPP_B04 -> Direction -> DirOut
12 * GPIO Settings -> GPIO_GPP_B -> GPP_B04 -> LockConfig -> PadUnlock
13 * GPIO Settings -> GPIO_GPP_B -> GPP_B23 -> GPIO Skip -> Disable
14 * GPIO Settings -> GPIO_GPP_B -> GPP_B23 -> PadMode -> GPIO control of the pad
15 * GPIO Settings -> GPIO_GPP_B -> GPP_B23 -> HostSoftPadOwn -> Host ownership to GPIO Driver mode
[all …]
|
| /Zephyr-latest/drivers/mipi_dbi/ |
| D | mipi_dbi_spi.c | 5 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/gpio.h>
21 /* Command/Data gpio */
23 /* Reset GPIO */
35 /* Expands to 1 if the node does not have the `write-only` property */
38 /* This macro will evaluate to 1 if any of the nodes with zephyr,mipi-dbi-spi
39 * lack a `write-only` property. The intention here is to allow the entire
40 * command_read function to be optimized out when it is not needed.
45 /* Expands to 1 if the node does reflect the enum in `xfr-min-bits` property */
49 /* This macros will evaluate to 1 if any of the nodes with zephyr,mipi-dbi-spi
[all …]
|
| /Zephyr-latest/include/zephyr/dt-bindings/gpio/ |
| D | renesas-rz-gpio.h | 3 * SPDX-License-Identifier: Apache-2.0
12 * @brief RZ G3S specific GPIO Flags
15 * - Bit 9..8: Pin driving ability value
16 * - Bit 11..10: Digital Noise Filter Clock Selection value
17 * - Bit 13..12: Digital Noise Filter Number value
18 * - Bit 14: Digital Noise Filter ON/OFF
20 * gpio-consumer {
21 * out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_FILTER_SET(1, 3, 3))>;
23 * gpio-consumer {
24 * out-gpios = <&port8 2 (GPIO_PULL_UP | RZG3S_GPIO_IOLH_SET(2))>;
[all …]
|
| /Zephyr-latest/soc/nordic/common/ |
| D | soc_nrf_common.h | 3 * SPDX-License-Identifier: Apache-2.0
19 * @brief Get a PSEL value out of a foo-gpios or foo-pin devicetree property
21 * Many Nordic bindings have 'foo-pin' properties to specify a pin
22 * configuration as a PSEL value directly instead of using a 'foo-gpios'
23 * <&gpioX Y flags> style controller phandle + GPIO specifier.
25 * It would be better to use 'foo-gpios' properties instead. This type
28 * To allow for a smooth migration from 'foo-pin' to 'foo-gpios', this
29 * helper macro can be used to get a PSEL value out of the devicetree
30 * using whichever one of 'foo-gpios' or 'foo-pin' is in the DTS.
34 * - NRF_DT_PSEL_CHECK_*() to check the property configuration at build time
[all …]
|
