Searched full:mailboxes (Results 1 – 16 of 16) sorted by relevance
10 Driver for stm32 IPCC mailboxes
6 Include interrupt-based inter-processor mailboxes
44 bool "Integrate mailboxes into object core framework"47 When enabled, this option integrates mailboxes into the object core
8 * @brief Mailboxes.78 /* Complete initialization of statically defined mailboxes. */ in init_mbox_module()450 /* Initialize and link statically defined mailboxes */ in init_mailbox_obj_core_list()
698 messages that can exist simultaneously, across all mailboxes
8 Include multi-channel interrupt-based inter-processor mailboxes
134 * enabling interrupts and mailboxes so remote can transmit in nxp_s32_mru_set_enabled()142 * Disable interrupts and mailboxes on this channel, making in nxp_s32_mru_set_enabled()
284 bool "Tracing Mailboxes"287 Enable tracing Mailboxes.
15 to group hardware channel's mailboxes in logical channels.
3 Mailboxes chapter18 Any number of mailboxes can be defined (limited only by available RAM). Each316 Any number of receiving threads may wait simultaneously on a mailboxes'
92 data_passing/mailboxes.rst
28 * :ref:`Mailboxes <mailboxes_v2>`
148 * mailbox 60 - 63 - Rx FIFO mailboxes149 * mailbox 56 - 59 - Tx FIFO mailboxes150 * non-FIFO mailboxes are not used
6 kernel objects: message queues, semaphores, memory slabs, mailboxes and pipes.
220 * ``ZEP-907`` - Test memory pool support (with mailboxes)
1739 Inter-processor mailboxes
