Searched full:labeled (Results 1 – 25 of 42) sorted by relevance
12
| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | panasonic,reduced-arduino-header.yaml | 30 These unconnected pins are labeled "NC" in the mapping above.
40 Arduino UNO layout, labeled from D0 at the bottom to D7 at the top, but D6
44 Arduino UNO layout, labeled from D8 at the bottom through D15 at the top,
|
| D | seeed-xiao-header.yaml | 14 labeled from 0 at the top through 6 at the bottom.
16 has three power pins, followed by four inputs labeled 10 at the
|
| D | arduino-header-r3.yaml | 15 labeled from A0 at the top through A5 at the bottom.
17 signals labeled from D0 at the bottom D7 at the top;
|
| D | sparkfun-pro-micro-header.yaml | 12 labeled from 0 at the top through 9 at the bottom.
|
| D | arduino-nano-header-r3.yaml | 12 signals labeled from A0 through A7, as well a digital signal D13. The
|
| /Zephyr-Core-3.5.0/.github/workflows/ |
| D | do_not_merge.yml | 5 types: [synchronize, opened, reopened, labeled, unlabeled]
16 echo "Pull request is labeled as 'DNM' or 'TSC'"
|
| D | backport.yml | 6 - labeled
21 github.event.action == 'labeled' &&
|
| D | assigner.yml | 15 - labeled
|
| /Zephyr-Core-3.5.0/boards/arm/particle_xenon/doc/ |
| D | index.rst | 81 - ``mesh_feather_i2c1_twi1.dtsi`` exposes TWI1 on labeled Feather
83 - ``mesh_feather_spi_spi1.dtsi`` exposes SPI1 on labeled Feather
85 - ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
87 - ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
90 labeled Feather UART pins
91 - ``mesh_xenon_uart2.dtsi`` exposes UARTE1 on labeled Feather
111 * TWI0 enabled on labeled header (SDA/SCL)
125 * UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
|
| /Zephyr-Core-3.5.0/boards/arm/particle_argon/doc/ |
| D | index.rst | 82 - ``mesh_feather_i2c1_twi1.dtsi`` exposes TWI1 on labeled Feather
84 - ``mesh_feather_spi_spi1.dtsi`` exposes SPI1 on labeled Feather
86 - ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
88 - ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
91 labeled Feather UART pins
110 * TWI0 enabled on labeled header (SDA/SCL)
124 * UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
|
| /Zephyr-Core-3.5.0/boards/arm/particle_boron/doc/ |
| D | index.rst | 82 - ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
84 - ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
87 labeled Feather UART pins
106 * TWI0 enabled on labeled header (SDA/SCL)
120 * UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
|
| /Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/ |
| D | nxp,s32-wkpu.yaml | 18 labeled `line_<line_number>`. For example:
|
| /Zephyr-Core-3.5.0/dts/bindings/adc/ |
| D | arduino,uno-adc.yaml | 8 has analog input signals labeled from A0 at the top through A5 at
|
| /Zephyr-Core-3.5.0/samples/boards/bbc_microbit/pong/ |
| D | README.rst | 13 micro:bit (labeled A and B). Initially the playing mode is selected: use
|
| /Zephyr-Core-3.5.0/boards/arm/gd32f350r_eval/doc/ |
| D | index.rst | 80 - J4: Select 2-3 for both (labeled as ``L``)
81 - J13: Select 1-2 position (labeled as ``USART``)
|
| /Zephyr-Core-3.5.0/boards/arm/sam_e70_xplained/ |
| D | sam_e70_xplained-common.dtsi | 42 /* The switch is labeled SW300 in the schematic, and labeled
|
| /Zephyr-Core-3.5.0/.github/ISSUE_TEMPLATE/ |
| D | 007_ext-source.md | 35 the PR is correctly labeled as "DNM"
|
| /Zephyr-Core-3.5.0/boards/arm/sam_v71_xult/ |
| D | sam_v71_xult-common.dtsi | 57 /* The switch is labeled SW300/301 in the schematic, and
58 * labeled SW0 on the board, and labeled ERASE User Button
|
| /Zephyr-Core-3.5.0/boards/arm/rddrone_fmuk66/doc/ |
| D | index.rst | 102 The K66F SoC has six UARTs. LPUART0 is configured for the console, UART0 is labeled Serial 2,
103 UART2 is labeled GPS, UART4 is labeled Serial 1. Any of these UARTs may be used as the console by
|
| /Zephyr-Core-3.5.0/samples/sensor/sgp40_sht4x/ |
| D | README.rst | 65 to the logarithm of the sensors resistance, hence it is labeled as [a.u.]
|
| /Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
| D | nxp,s32k3-pinctrl.yaml | 8 the pin function selection and pin properties. This node, labeled 'pinctrl' in
|
| D | nxp,s32ze-pinctrl.yaml | 8 the pin function selection and pin properties. This node, labeled 'pinctrl' in
|
| /Zephyr-Core-3.5.0/samples/drivers/spi_flash_at45/ |
| D | README.rst | 97 of AT45 family chips but only the one labeled "DATAFLASH_1" is required
|
| /Zephyr-Core-3.5.0/samples/drivers/soc_flash_nrf/ |
| D | README.rst | 24 defined over that internal flash labeled `slot1_partition`, when
|
| /Zephyr-Core-3.5.0/boards/riscv/gd32vf103c_starter/doc/ |
| D | index.rst | 77 - JP5/6: Select 1-2 positions (labeled as ``USART0``)
|
12
