Searched full:emios (Results 1 – 12 of 12) sorted by relevance
| /Zephyr-latest/drivers/misc/nxp_s32_emios/ |
| D | Kconfig | 5 bool "NXP S32 eMIOS drivers"
8 Enable drivers for NXP S32 EMIOS
13 module-str = NXP S32 eMIOS
17 int "NXP S32 eMIOS initialization priority"
20 System initialization priority for NXP S32 eMIOS drivers.
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| D | nxp_s32_emios.c | 30 LOG_ERR("Could not initialize eMIOS"); in nxp_s32_emios_init()
55 "Divider for eMIOS global prescaler is out of range"); \
94 #define EMIOS_INTERRUPT_NAME(name) DT_CAT3(EMIOS, name, _IRQ)
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| /Zephyr-latest/dts/bindings/pwm/ |
| D | nxp,s32-emios-pwm.yaml | 5 NXP S32 eMIOS PWM node for S32 SoCs. Each channel in eMIOS can be configured
10 For example to configuring eMIOS instance 0 with:
14 - Channel 3 for mode SAIC, use internal timebase with input filter = 2 eMIOS clock
56 'nxp,s32-emios' bindings.
58 compatible: "nxp,s32-emios-pwm"
80 eMIOS PWM channel configuration.
86 description: eMIOS PWM channel
117 - SAIC: single action input capture mode, the eMIOS captures events as soon as
156 - "PRESCALED_CLOCK" # Clock source = eMIOS clock / (global prescaler)
157 - "MODULE_CLOCK" # Clock source = eMIOS clock
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| /Zephyr-latest/dts/bindings/misc/ |
| D | nxp,s32-emios.yaml | 5 NXP S32 Enhanced Modular IO SubSystem (eMIOS) node for S32 SoCs.
6 eMIOS provides independent unified channels (UCs), some of channels
10 compatible: "nxp,s32-emios"
42 Node for eMIOS master bus. Each channel is capable to become a master bus has
47 For example, to enable bus A of eMIOS instance 0 that can be used as timebase
82 Clock for internal counter = (eMIOS clock / global prescaler) / internal prescaler.
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | nxp,s32-qdec.yaml | 6 with the cooperation of S32 IP blocks- eMIOS, TRGMUX and LCU.
39 emios = <&emios0>;
40 emios-channels = <6 7>;
78 emios:
81 phandle to the eMIOS node.
109 emios-channels:
112 This is the array containing 2 emios channel TypeG numbers used by the qdec.
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| /Zephyr-latest/drivers/pwm/ |
| D | Kconfig.nxp_s32_emios | 5 bool "NXP S32 PWM-eMIOS driver"
12 Enable support for the NXP S32 PWM-eMIOS.
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| D | pwm_nxp_s32_emios.c | 426 /* Clock source for internal prescaler is from either eMIOS or eMIOS / global prescaler */ in pwm_nxp_s32_get_cycles_per_sec()
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| /Zephyr-latest/drivers/sensor/nxp/qdec_nxp_s32/ |
| D | qdec_nxp_s32.c | 40 /* Configuration variables from eMIOS Icu driver */
169 /* Initialize the positions of the eMios hw channels used for QDEC in qdec_s32_initialize()
170 * to be beyond the eMios pwm hw channels. Currently only pwm and qdec in qdec_s32_initialize()
171 * are using the eMios channels so qdec ones are the last two. in qdec_s32_initialize()
178 /* Set Overflow Notification for eMIOS channels meant in qdec_s32_initialize()
437 .emios_inst = EMIOS_NXP_S32_GET_INSTANCE(DT_INST_PHANDLE(n, emios)), \
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_s32k344_m7.dtsi | 665 emios0: emios@40088000 {
666 compatible = "nxp,s32-emios";
714 compatible = "nxp,s32-emios-pwm";
720 emios1: emios@4008c000 {
721 compatible = "nxp,s32-emios";
769 compatible = "nxp,s32-emios-pwm";
775 emios2: emios@40090000 {
776 compatible = "nxp,s32-emios";
824 compatible = "nxp,s32-emios-pwm";
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| /Zephyr-latest/boards/nxp/mr_canhubk3/ |
| D | mr_canhubk3.dts | 133 emios = <&emios0>;
135 * eMios channel numbers for qdec should be beyond the channel numbers
136 * used by the emios pwm
138 emios-channels = <6 7>;
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| /Zephyr-latest/boards/nxp/mr_canhubk3/doc/ |
| D | index.rst | 19 - 12-bit 1 Msps ADC, 16-bit eMIOS timer
55 eMIOS on-chip pwm
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-3.5.rst | 651 * Added PWM driver based on NXP S32 EMIOS peripheral.
1571 * :dtcompatible:`nxp,s32-emios`
1572 * :dtcompatible:`nxp,s32-emios-pwm`
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