Searched full:depth (Results 1 – 25 of 253) sorted by relevance
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| /Zephyr-latest/dts/bindings/mspi/ |
| D | snps,designware-ssi.yaml | 22 fifo-depth:
27 If the RX FIFO depth is not specified separately in the rx-fifo-depth
28 property, this value specifies depth of both TX and RX FIFOs.
30 rx-fifo-depth:
39 Maximum value is the TX FIFO depth - 1.
45 interrupt. Maximum value is the RX FIFO depth - 1.
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| /Zephyr-latest/dts/bindings/spi/ |
| D | snps,designware-spi.yaml | 24 fifo-depth:
27 RX/TX FIFO depth. Corresponds to the SSI_TX_FIFO_DEPTH
29 Serial Interface. Depth ranges from 2-256.
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| /Zephyr-latest/dts/bindings/serial/ |
| D | altr,jtag-uart.yaml | 11 write-fifo-depth:
16 Must be same as Write FIFO: Buffer depth (bytes) in platform designer.
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| /Zephyr-latest/dts/bindings/dai/ |
| D | nxp,dai-micfil.yaml | 21 fifo-depth:
25 Depth (in words) for each channel's FIFO.
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| D | nxp,dai-esai.yaml | 37 fifo-depth:
40 Use this property to set the FIFO depth that will be reported
44 we mean the actual (hardware) value of the FIFO depth. This is needed
47 Generally, reporting a false FIFO depth should be avoided. Please note
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| D | nxp,dai-sai.yaml | 25 fifo-depth = <48>;
41 fifo-depth = <8>;
64 fifo-depth:
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| /Zephyr-latest/dts/bindings/i2c/ |
| D | cdns,i2c.yaml | 17 fifo-depth = <8>;
39 fifo-depth:
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| /Zephyr-latest/subsys/sip_svc/ |
| D | Kconfig | 40 int "ARM SiP service request message queue depth"
43 Depth of msgq used inside sip_svc controller.
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| /Zephyr-latest/dts/arc/synopsys/ |
| D | emsdp.dtsi | 97 fifo-depth = <32>;
115 fifo-depth = <32>;
141 fifo-depth = <16>;
156 fifo-depth = <16>;
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_backtrace.h | 90 * @param depth The maximum number of stack frames to print (should be > 0)
94 * - 0 Backtrace successfully printed to completion or to depth limit
97 int xtensa_backtrace_print(int depth, int *interrupted_stack);
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| /Zephyr-latest/dts/bindings/i2s/ |
| D | litex,i2s.yaml | 16 fifo-depth:
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| /Zephyr-latest/arch/x86/core/ |
| D | Kconfig.intel64 | 29 support limited call-tree depth and must fit into the low core,
61 int "Maximum IRQ nesting depth"
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| /Zephyr-latest/scripts/ci/ |
| D | twister_report_analyzer.py | 99 def get_next_entry(self, depth: int = 0, max_depth: int = 10):
102 yield depth, value.quantity, key, ', '.join(value.tests[0:100])
103 if value.has_subcounters() and depth < max_depth:
104 yield from value.subcounters.get_next_entry(depth + 1, max_depth)
308 csvwriter.writerow(['Depth', 'Counter', 'Key', 'Tests'])
317 for depth, quantity, key, _ in data.get_next_entry(max_depth=max_depth):
318 if depth == 0:
321 if depth == 0:
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| /Zephyr-latest/samples/modules/lvgl/demos/boards/ |
| D | mimxrt595_evk_mimxrt595s_cm33.conf | 7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
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| /Zephyr-latest/samples/drivers/display/boards/ |
| D | mimxrt1170_evk_mimxrt1176_cm7_A.conf | 7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
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| D | mimxrt595_evk_mimxrt595s_cm33.conf | 7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
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| D | mimxrt1170_evkb_cm7.conf | 7 # Sample will allocate buffer equal to: (panelwidth / 8) * (panelwidth / 4) * pixel depth. For a
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| /Zephyr-latest/doc/connectivity/networking/api/ |
| D | ip_4_6.rst | 8 :depth: 2
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| D | net_linkaddr.rst | 8 :depth: 2
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| D | sntp.rst | 8 :depth: 2
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| D | dhcpv6.rst | 8 :depth: 2
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| D | trickle.rst | 8 :depth: 2
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| D | lldp.rst | 8 :depth: 2
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| /Zephyr-latest/.github/workflows/ |
| D | compliance.yml | 24 fetch-depth: 0
63 …west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.up…
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| /Zephyr-latest/drivers/dai/intel/ssp/ |
| D | ssp.h | 48 /* the SSP port fifo depth */
51 /* the watermark for the SSP fifo depth setting */
123 uint32_t depth; member
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