Searched +full:axistream +full:- +full:control +full:- +full:connected (Results 1 – 2 of 2) sorted by relevance
2 # SPDX-License-Identifier: Apache-2.06 include: dma-controller.yaml13 description: DMA Control registers21 interrupt-parent:23 description: Interrupt controller that the DMA is connected to26 type: phandle-array28 clock-frequency:36 - 3237 - 6439 axistream-connected:[all …]
7 * SPDX-License-Identifier: Apache-2.023 /* masks for control field in SG descriptor */40 /* internal DMA error, e.g., 0-length transfer */59 /* interrupt timeout - trigger interrupt after X cycles when no transfer. Unit is 125 * */62 /* irqthreshold - this can be used to generate interrupts after X completed packets */84 /* run-stop */118 /* RS (run-stop) in DMACR is 0 and operations completed; writing tail does nothing */147 /* in-memory descriptor, read by the DMA, that instructs it how many bits to transfer from which */150 /* next descriptor[31:6], bits 5-0 reserved */162 uint32_t control; member[all …]
