Home
last modified time | relevance | path

Searched full:load (Results 1 – 25 of 186) sorted by relevance

12345678

/cmsis-dsp-latest/dsppp/Include/dsppp/Helium/
Dmatrix_multiply_f16.hpp56 * load initial offsets
61 * load {a00 a00 a10 a10 x x x x }
65 * load {b00 b01 b00 b01 x x x x }
80 * load {a01 a01 a11 a11 x x x x}
88 * load {b10, b11, b10, b11, x x x x }
139 * load initial offsets
145 * load {a00 a00 a00 a10 a10 a10 a20 a20}
149 * load {b00 b01 b02 b00 b01 b02 b00 b01}
164 * load {a01 a01 a01 a11 a11 a11 a21 a21}
172 * load {b10, b11, b12, b10, b11, b12, b10, b11}
[all …]
Dfloat.hpp488 * @brief Vector load with stride
490 * @param[in] p Load address
517 * @brief Vector load with dynamic stride
519 * @param[in] p Load address
533 * @brief Vector load with stride and predicate
535 * @param[in] p Load address
568 * @brief Vector load with dynamic stride and loop predication
570 * @param[in] p Load address
590 * @brief Load with generalized stride (gather load)
598 * @brief Load with generalized stride
[all …]
Dmatrix_multiply_f32.hpp153 * load {b0,0, b0,1, b0,2, 0}
162 * load {b1,0, b1,1, b1,2, 0}
171 * load {b2,0, b2,1 , b2,2, 0}
220 * load {b0,0, b0,1, b0,2, b0,3}
230 * load {b1,0, b1,1, b1,2, b1,3}
240 * load {b2,0, b2,1, b2,2, b2,3}
250 * load {b3,0, b3,1, b3,2, b3,3}
Dmatrix_multiply.hpp155 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
208 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
265 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
300 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
Dq15.hpp249 * @brief Vector load with stride
251 * @param[in] p Load address
256 * @return Gather load
259 * for gather load cannot be bigger than 65535.
/cmsis-dsp-latest/Source/MatrixFunctions/
Darm_mat_mult_f16.c68 * load initial offsets in arm_mat_mult_f16_2x2_mve()
73 * load {a00 a00 a10 a10 x x x x } in arm_mat_mult_f16_2x2_mve()
77 * load {b00 b01 b00 b01 x x x x } in arm_mat_mult_f16_2x2_mve()
92 * load {a01 a01 a11 a11 x x x x} in arm_mat_mult_f16_2x2_mve()
100 * load {b10, b11, b10, b11, x x x x } in arm_mat_mult_f16_2x2_mve()
137 * load initial offsets in arm_mat_mult_f16_3x3_mve()
143 * load {a00 a00 a00 a10 a10 a10 a20 a20} in arm_mat_mult_f16_3x3_mve()
147 * load {b00 b01 b02 b00 b01 b02 b00 b01} in arm_mat_mult_f16_3x3_mve()
162 * load {a01 a01 a01 a11 a11 a11 a21 a21} in arm_mat_mult_f16_3x3_mve()
170 * load {b10, b11, b12, b10, b11, b12, b10, b11} in arm_mat_mult_f16_3x3_mve()
[all …]
Darm_mat_mult_f32.c162 * load {b0,0, b0,1, b0,2, 0} in arm_mat_mult_f32_3x3_mve()
171 * load {b1,0, b1,1, b1,2, 0} in arm_mat_mult_f32_3x3_mve()
180 * load {b2,0, b2,1 , b2,2, 0} in arm_mat_mult_f32_3x3_mve()
224 * load {b0,0, b0,1, b0,2, b0,3} in arm_mat_mult_f32_4x4_mve()
234 * load {b1,0, b1,1, b1,2, b1,3} in arm_mat_mult_f32_4x4_mve()
244 * load {b2,0, b2,1, b2,2, b2,3} in arm_mat_mult_f32_4x4_mve()
254 * load {b3,0, b3,1, b3,2, b3,3} in arm_mat_mult_f32_4x4_mve()
364 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} in arm_mat_mult_f32()
416 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} in arm_mat_mult_f32()
473 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} in arm_mat_mult_f32()
[all …]
/cmsis-dsp-latest/
DARM.CMSIS-DSP.pdsc105 <environment name="uv" load="arm_bayes_example.uvprojx"/>
119 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
133 <environment name="uv" load="arm_convolution_example.uvprojx"/>
147 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
161 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
175 <environment name="uv" load="arm_fir_example.uvprojx"/>
189 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
203 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
217 <environment name="uv" load="arm_matrix_example.uvprojx"/>
231 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
[all …]
/cmsis-dsp-latest/PrivateInclude/
Darm_vec_fft.h72 /* load scheduling to increase gather load idx update / gather load distance */ in arm_bitreversal_32_inpl_mve()
149 /* load scheduling to increase gather load idx update / gather load distance */ in arm_bitreversal_16_inpl_mve()
247 /* issued earlier to increase gather load idx update / gather load distance */ in arm_bitreversal_32_outpl_mve()
293 /* issued earlier to increase gather load idx update / gather load distance */ in arm_bitreversal_16_outpl_mve()
/cmsis-dsp-latest/Testing/Source/Tests/
DExampleCategoryF32.cpp54 setUp function is used to load the patterns and create required buffers
78 /* Load patterns with all samples */ in setUp()
86 /* Load patterns with 9 samples */ in setUp()
/cmsis-dsp-latest/Testing/FrameworkSource/
DTiming.cpp37 SysTick->LOAD = SYSTICK_INITIAL_VALUE; in initCycleMeasurement()
88 SysTick->LOAD = SYSTICK_INITIAL_VALUE; in cycleMeasurementStart()
119 SysTick->LOAD = SYSTICK_INITIAL_VALUE; in cycleMeasurementStop()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA5/
DARMCA5.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA7/
DARMCA7.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA9/
DARMCA9.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
/cmsis-dsp-latest/dsppp/tests/
Dfilter_test.cpp49 * load coefs \
228 * load 8 coefs in debug_arm_fir_q15()
290 * load 8 coefs in debug_arm_fir_q15()
339 * load 8 coefs in debug_arm_fir_q15()
380 * load 8 coefs in debug_arm_fir_q15()
/cmsis-dsp-latest/Source/TransformFunctions/
Darm_cfft_q31.c90 * load 2 x q31 complex pair in _arm_radix4_butterfly_q31_mve()
176 * load scheduling in _arm_radix4_butterfly_q31_mve()
193 * pre-load for next iteration in _arm_radix4_butterfly_q31_mve()
340 * load 2 x q31 complex pair in _arm_radix4_butterfly_inverse_q31_mve()
426 * load scheduling in _arm_radix4_butterfly_inverse_q31_mve()
443 * pre-load for next iteration in _arm_radix4_butterfly_inverse_q31_mve()
Darm_cfft_f16.c134 * load 2 f16 complex pair in _arm_radix4_butterfly_f16_mve()
213 /* load scheduling */ in _arm_radix4_butterfly_f16_mve()
229 /* pre-load for next iteration */ in _arm_radix4_butterfly_f16_mve()
342 * load 2 f32 complex pair in _arm_radix4_butterfly_inverse_f16_mve()
421 * load scheduling in _arm_radix4_butterfly_inverse_f16_mve()
Darm_cfft_q15.c86 * load 4 x q15 complex pair in _arm_radix4_butterfly_q15_mve()
165 * load scheduling in _arm_radix4_butterfly_q15_mve()
182 * pre-load for next iteration in _arm_radix4_butterfly_q15_mve()
324 * load 4 x q15 complex pair in _arm_radix4_butterfly_inverse_q15_mve()
402 * load scheduling in _arm_radix4_butterfly_inverse_q15_mve()
419 * pre-load for next iteration in _arm_radix4_butterfly_inverse_q15_mve()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM23/
DARMCM23_ac6.sct87 LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
88 ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
114 LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33/
DARMCM33_ac6.sct87 LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
88 ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
118 LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33_DSP_FP/
DARMCM33_ac6.sct87 LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
88 ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
114 LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM35P_DSP_FP/
DARMCM35P_ac6.sct87 LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
88 ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
114 LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM55/
DARMCM55_ac6.sct87 LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
88 ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
114 LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
/cmsis-dsp-latest/Source/StatisticsFunctions/
Darm_absmax_no_idx_f64.c67 /* Load first input value that act as reference value for comparision */ in arm_absmax_no_idx_f64()
125 /* Load first input value that act as reference value for comparision */ in arm_absmax_no_idx_f64()
Darm_absmin_no_idx_f64.c65 /* Load first input value that act as reference value for comparision */ in arm_absmin_no_idx_f64()
120 /* Load first input value that act as reference value for comparision */ in arm_absmin_no_idx_f64()

12345678