Searched full:gpio5 (Results 1 – 25 of 75) sorted by relevance
123
| /Zephyr-latest/dts/bindings/regulator/ |
| D | regulator-gpio.yaml | 15 enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
17 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>, <&gpio5 2 GPIO_ACTIVE_HIGH>;
73 enable-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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| /Zephyr-latest/tests/drivers/gpio/gpio_basic_api/boards/ |
| D | udoo_neo_full_mcimx6x_m4.overlay | 10 out-gpios = <&gpio5 14 0>; /* J4 pin 4 */
11 in-gpios = <&gpio5 15 0>; /* J4 pin 3 */
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| /Zephyr-latest/boards/renesas/rcar_h3ulcb/ |
| D | rcar_h3ulcb_r8a77951_a57.dts | 40 enable-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
50 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
57 &gpio5 {
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| /Zephyr-latest/dts/bindings/sound/ |
| D | cirrus,cs47l63.yaml | 44 gpio5-gpios:
47 GPIO5 input with bus-keeper
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| /Zephyr-latest/soc/nxp/kinetis/kwx/ |
| D | soc_kw2xd.c | 80 * depends on the state of GPIO5 during transceiver reset. The frequency
81 * will be 4 MHz if the GPIO5 pin is low, otherwise it will be 32.78689 kHz.
90 /* Set PORTC.0 as output - modem GPIO5 pin */ in set_modem_clock()
98 /* Clear modem GPIO5 pin */ in set_modem_clock()
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| /Zephyr-latest/tests/drivers/spi/spi_loopback/boards/ |
| D | mimx8mm_phyboard_polis_mimx8mm6_m4.overlay | 26 &gpio5 {
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| /Zephyr-latest/boards/phytec/phyboard_polis/ |
| D | phyboard_polis_mimx8mm6_m4.dts | 55 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
78 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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| /Zephyr-latest/boards/infineon/xmc47_relax_kit/ |
| D | xmc47_relax_kit.dts | 32 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
35 gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
161 &gpio5 {
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | raspberrypi,pico-header.yaml | 17 5 GPIO5/I2C0_SCL GPIO28/ADC2 28
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| D | raspberrypi-40pins-header.yaml | 25 19 GPIO5 GND -
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| D | adi,sdp-120.yaml | 55 45 GPIO4 GPIO5 76
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| /Zephyr-latest/boards/lilygo/ttgo_t7v1_5/ |
| D | ttgo_t7v1_5-pinctrl.dtsi | 28 /* GPIO5 is CS */
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| /Zephyr-latest/boards/qemu/cortex_m3/ |
| D | qemu_cortex_m3.dts | 73 &gpio5 {
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| /Zephyr-latest/dts/bindings/i2c/ |
| D | ti,tca954x-base.yaml | 20 reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
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| /Zephyr-latest/boards/udoo/udoo_neo_full/ |
| D | udoo_neo_full_mcimx6x_m4.dts | 66 &gpio5 {
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| /Zephyr-latest/boards/nxp/mimxrt595_evk/ |
| D | mimxrt595_evk_mimxrt595s_cm33.dts | 97 <16 0 &gpio5 0 0>, /* D10 */
98 <17 0 &gpio5 1 0>, /* D11 */
99 <18 0 &gpio5 2 0>, /* D12 */
100 <19 0 &gpio5 3 0>, /* D13 */
312 &gpio5 {
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| /Zephyr-latest/boards/nxp/vmu_rt1170/ |
| D | vmu_rt1170.dtsi | 21 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
26 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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| D | vmu_rt1170_mimxrt1176_cm7.dts | 123 enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
153 &gpio5 {
503 int-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
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| /Zephyr-latest/dts/arm/infineon/cat3/xmc/ |
| D | xmc4500_F100x1024.dtsi | 87 gpio5: gpio@48028500 { label
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| D | xmc4700_F144x2048.dtsi | 81 gpio5: gpio@48028500 { label
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| /Zephyr-latest/drivers/mfd/ |
| D | mfd_axp192.c | 536 /* read gpio5 */ in mfd_axp192_gpio_read_port()
544 LOG_DBG("GPIO5 pinval-reg =0x%x", gpio5_val); in mfd_axp192_gpio_read_port()
594 /* Write gpio5. Mask out other port pins */ in mfd_axp192_gpio_write_port()
603 LOG_DBG("GPIO5 pinval-reg =0x%x mask=0x%x\n", gpio_reg_val, gpio_reg_mask); in mfd_axp192_gpio_write_port()
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| /Zephyr-latest/drivers/pinctrl/ |
| D | pinctrl_max32.c | 23 ADI_MAX32_GET_PORT_ADDR_OR_NONE(gpio5)
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| /Zephyr-latest/include/zephyr/dt-bindings/gpio/ |
| D | adi-sdp-120.h | 65 #define SDP_120_GPIO5 SDP_120_IO(76) /* GPIO5 */
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_rt1015.dtsi | 143 &gpio5{
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| /Zephyr-latest/dts/arm/ti/ |
| D | lm3s6965.dtsi | 119 gpio5: gpio@40025000 { label
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