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/Zephyr-latest/dts/bindings/clock/
Dst,stm32wba-rcc.yaml86 ahb5-prescaler:
95 AHB5 prescaler. Defines actual core clock frequency (HCLK5) based on
130 ahb5-div:
133 AHB5 divider. Applies only when SysClock source is HSI16 or HSE32.
134 When enabled, AHB5 clock is SysClock / 2.
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32wba_core/boards/
Dhsi_16_ahb5_div.overlay20 ahb5-div;
Dhse_32.overlay20 ahb5-prescaler = <1>;
Dpll_hse_100.overlay30 ahb5-prescaler = <4>;
Dpll_hse_100_ahb_50.overlay30 ahb5-prescaler = <4>;
Dclear_clocks.overlay34 /delete-property/ ahb5-prescaler;
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c183 /* PLL is the SYSCLK source, use 'ahb5-prescaler' */ in stm32_clock_control_get_subsys_rate()
187 /* PLL is not the SYSCLK source, use 'ahb5-div'(if set) */ in stm32_clock_control_get_subsys_rate()
196 __ASSERT(ahb5_clock <= MHZ(32), "AHB5 clock frequency exceeds 32 MHz"); in stm32_clock_control_get_subsys_rate()
575 /* PLL is the SYSCLK source, use 'ahb5-prescaler' */ in stm32_clock_control_init()
578 /* PLL is not the SYSCLK source, use 'ahb5-div'(if set) */ in stm32_clock_control_init()
/Zephyr-latest/boards/st/nucleo_wba52cg/
Dnucleo_wba52cg.dts80 ahb5-prescaler = <4>;
/Zephyr-latest/boards/st/nucleo_wba55cg/
Dnucleo_wba55cg.dts99 ahb5-prescaler = <2>;
/Zephyr-latest/boards/arm/v2m_musca_b1/doc/
Dindex.rst276 - AHB5 TrustZone Memory Protection Controller (MPC).
277 - AHB5 TrustZone Peripheral Protection Controller (PPC).
/Zephyr-latest/boards/arm/v2m_musca_s1/doc/
Dindex.rst270 - AHB5 TrustZone Memory Protection Controller (MPC).
271 - AHB5 TrustZone Peripheral Protection Controller (PPC).
/Zephyr-latest/boards/arm/mps2/doc/
Dmps2_an521.rst460 - AHB5 TrustZone Memory Protection Controller (MPC)
461 - AHB5 TrustZone Peripheral Protection Controller (PPC)