Searched full:55 (Results 1 – 25 of 253) sorted by relevance
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/Zephyr-latest/samples/drivers/lora/receive/ |
D | README.rst | 49 [00:00:04.834,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 53 [00:00:06.127,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 56 [00:00:07.419,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 59 [00:00:08.712,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 62 [00:00:10.004,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 65 [00:00:11.297,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 68 [00:00:12.590,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 71 [00:00:13.884,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 74 [00:00:15.177,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB 77 [00:00:16.470,000] <inf> lora_receive: LoRa RX RSSI: -55dBm, SNR: 9dB [all …]
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/Zephyr-latest/soc/neorv32/ |
D | Kconfig.defconfig | 16 default 55 20 default 55
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/Zephyr-latest/boards/shields/waveshare_epaper/ |
D | waveshare_epaper_gdeh0213b1.overlay | 38 22 55 AA 55 AA 55 AA 11
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/Zephyr-latest/boards/phytec/reel_board/ |
D | reel_board.dts | 74 22 55 AA 55 AA 55 AA 11
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/Zephyr-latest/tests/drivers/build_all/eeprom/boards/ |
D | nrf9131ek_nrf9131.conf | 1 CONFIG_MFD_INIT_PRIORITY=55
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/Zephyr-latest/samples/tfm_integration/psa_crypto/src/ |
D | psa_attestation.c | 101 * 00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF in att_test() 102 * 00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF in att_test() 103 * 00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF in att_test() 104 * 00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF in att_test()
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/Zephyr-latest/samples/subsys/logging/dictionary/ |
D | README.rst | 81 … 48 45 58 44 55 4d 50 21 20 48 45 58 44 55 4d 50 |HEXDUMP! HEXDUMP 82 40 20 48 45 58 44 55 4d 50 23 |@ HEXDUM P#
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/Zephyr-latest/tests/drivers/fuel_gauge/bq27z746/boards/ |
D | native_sim.overlay | 6 bq27z746: bq27z746@55 {
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/ |
D | ti-cc32xx-pinctrl.h | 170 #define GPIO1_P55 TI_CC32XX_PINMUX(55U, 0U) 171 #define UART0_TX_P55 TI_CC32XX_PINMUX(55U, 3U) 172 #define PCLK_P55 TI_CC32XX_PINMUX(55U, 4U) 173 #define UART1_TX_P55 TI_CC32XX_PINMUX(55U, 6U) 174 #define GT_CCP01_P55 TI_CC32XX_PINMUX(55U, 7U)
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/Zephyr-latest/boards/snps/iotdk/ |
D | Kconfig.iotdk | 12 implementation of the ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's 55-nm
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/Zephyr-latest/boards/nxp/imx93_evk/ |
D | Kconfig.defconfig | 27 default 55
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/Zephyr-latest/samples/net/sockets/packet/ |
D | Kconfig | 27 default "00:11:22:33:44:55"
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/Zephyr-latest/drivers/sensor/ntc_thermistor/ |
D | ntc_thermistor.c | 190 { 55, 2956 }, 216 { 55, 13539 }, 242 { 55, 3536 }, 268 { 55, 3535 },
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/Zephyr-latest/samples/net/sockets/echo_server/ |
D | overlay-ot.conf | 31 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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D | overlay-ot-rcp-host-nxp.conf | 42 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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/Zephyr-latest/dts/bindings/memory-controllers/ |
D | atmel,sam-smc.yaml | 33 The above example configures a is66wv51216dbll-55 device. The device is a 37 55ns, as per specification, it requires atmel,smc-cycle-timing of at least 41 is66wv51216dbll-55 a minimum setup of 5ns (1 cycle) with at least 45ns
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/Zephyr-latest/samples/net/sockets/echo_client/ |
D | overlay-ot.conf | 31 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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D | overlay-ot-rcp-host-nxp.conf | 46 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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/Zephyr-latest/samples/net/lwm2m_client/ |
D | overlay-ot.conf | 34 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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/Zephyr-latest/drivers/bbram/ |
D | Kconfig | 28 default 55 if BBRAM_MICROCHIP_MCP7940N
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/Zephyr-latest/tests/bsim/net/sockets/echo_test/ |
D | overlay-ot.conf | 33 CONFIG_OPENTHREAD_NETWORKKEY="00:11:22:33:44:55:66:77:88:99:aa:bb:cc:dd:ee:ff"
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/Zephyr-latest/drivers/dai/intel/alh/ |
D | alh_map.h | 71 52, /* 55 - BIDIRECTIONAL */ 74 55, /* 58 - BIDIRECTIONAL */
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/Zephyr-latest/drivers/dma/ |
D | dma_iproc_pax_v2.h | 77 uint64_t res3 : 4; /*res :52:55*/ 87 uint64_t pcie_addr_lsb : 56; /* pcie_addr_lsb 0:55*/
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | ti,cc32xx-pinctrl.yaml | 7 use this node to route UART0 RX to pin 55 and enable the pull-up resistor 32 /* configure pin 55 as UART0 TX and pin 61 as UART0 CTS */
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/Zephyr-latest/drivers/serial/ |
D | Kconfig.xen | 33 default 55
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