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/Zephyr-latest/soc/nxp/imx/imx6sx/
Dsoc_clk_freq.c4 * SPDX-License-Identifier: Apache-2.0
15 uint32_t root; in get_pwm_clock_freq() local
19 /* Different instance has the same clock root, it's different from i.mx7d. */ in get_pwm_clock_freq()
20 /* Get the clock root according to the mux node of clock tree. */ in get_pwm_clock_freq()
23 root = ccmRootmuxPerclkClkOsc24m; in get_pwm_clock_freq()
31 root = CCM_GetRootMux(CCM, ccmRootPrePeriphClkSel); in get_pwm_clock_freq()
32 /* Here do not show all the clock root source, in get_pwm_clock_freq()
33 * if user use other clock root source, such as PLL2_PFD2, please in get_pwm_clock_freq()
36 switch (root) { in get_pwm_clock_freq()
49 root = ccmRootmuxPeriphClk2OSC24m; in get_pwm_clock_freq()
[all …]
/Zephyr-latest/lib/libc/minimal/source/math/
Dsqrt.c4 * SPDX-License-Identifier: Apache-2.0
27 int64double_t root; in sqrt() local
37 return (square - square) / (square - square); in sqrt()
42 * this assumes IEEE-754 format doubles in sqrt()
44 exponent = ((p_square.i & EXP_MASK64) >> 52) - 1023; in sqrt()
45 if (exponent == 0x7FF - 1023) { in sqrt()
50 root.i = (p_square.i & ~EXP_MASK64) | (exponent + 1023) << 52; in sqrt()
53 last = root; in sqrt()
54 root.d = (root.d + square / root.d) * 0.5; in sqrt()
55 /* if (llabs(*p_root-*p_last)<MAX_D_ERROR_COUNT) */ in sqrt()
[all …]
Dsqrtf.c4 * SPDX-License-Identifier: Apache-2.0
27 intfloat_t root; in sqrtf() local
37 return (square - square) / (square - square); in sqrtf()
42 * this assumes IEEE-754 format doubles in sqrtf()
44 exponent = ((p_square.i & EXP_MASK32) >> 23) - 127; in sqrtf()
45 if (exponent == 0xFF - 127) { in sqrtf()
50 root.i = (p_square.i & ~EXP_MASK32) | (exponent + 127) << 23; in sqrtf()
53 last = root; in sqrtf()
54 root.f = (root.f + square / root.f) * 0.5f; in sqrtf()
55 /* if (labs(*p_root - *p_last) < MAX_F_ERROR_COUNT) */ in sqrtf()
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/Zephyr-latest/soc/nxp/imx/imx7d/
Dsoc_clk_freq.c4 * SPDX-License-Identifier: Apache-2.0
14 uint32_t root; in get_pwm_clock_freq() local
20 root = CCM_GetRootMux(CCM, ccmRootPwm1); in get_pwm_clock_freq()
24 root = CCM_GetRootMux(CCM, ccmRootPwm2); in get_pwm_clock_freq()
28 root = CCM_GetRootMux(CCM, ccmRootPwm3); in get_pwm_clock_freq()
32 root = CCM_GetRootMux(CCM, ccmRootPwm4); in get_pwm_clock_freq()
39 switch (root) { in get_pwm_clock_freq()
/Zephyr-latest/lib/libc/minimal/source/stdlib/
Dqsort.c4 * SPDX-License-Identifier: Apache-2.0
14 * Normally parent is defined parent(k) = floor((k-1) / 2) but we can avoid a
15 * divide by noticing that floor((k-1) / 2) = ((k - 1) >> 1).
18 #define parent(k) (((k) - 1) >> 1)
45 if (cmp->has3) { in compare()
46 return cmp->comp3(a, b, cmp->arg); in compare()
49 return cmp->comp2(a, b); in compare()
54 int root; in sift_down() local
58 for (swap = start, root = swap; left(root) < end; root = swap) { in sift_down()
59 child = left(root); in sift_down()
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/Zephyr-latest/tests/subsys/fs/common/
Dtest_fs_dirops.c5 * SPDX-License-Identifier: Apache-2.0
38 "root init failed"); in check_mkdir()
65 -ENOTEMPTY, in check_mkdir()
85 TC_PRINT("building layout on %s\n", mp->mnt_point); in build_layout()
87 zassert_equal(fs_statvfs(mp->mnt_point, &stat), 0, in build_layout()
95 "root init failed"); in build_layout()
101 zassert_equal(fs_statvfs(mp->mnt_point, &stat), 0, in build_layout()
120 "root init failed"); in check_layout()
132 if (cp->name != NULL) { in check_layout()
134 cp->name, in check_layout()
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/Zephyr-latest/cmake/modules/
Droot.cmake1 # SPDX-License-Identifier: Apache-2.0
3 # Copyright (c) 2021-2023, Nordic Semiconductor ASA
7 # This CMake module will convert all relative paths in existing ROOT lists to
11 # - ARCH_ROOT: CMake list of arch roots containing arch implementations
12 # - SOC_ROOT: CMake list of SoC roots containing SoC implementations
13 # - BOARD_ROOT: CMake list of board roots containing board and shield implementations
14 # - MODULE_EXT_ROOT: CMake list of module external roots containing module glue code
15 # - SCA_ROOT: CMake list of SCA roots containing static code analysis integration code
17 # If a root is defined it will check the list of paths in the root and convert
18 # any relative path to absolute path and update the root list.
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DFindScaTools.cmake1 # SPDX-License-Identifier: Apache-2.0
21 foreach(root ${SCA_ROOT})
22 if(EXISTS ${root}/cmake/sca/${ZEPHYR_SCA_VARIANT}/sca.cmake)
23 include(${root}/cmake/sca/${ZEPHYR_SCA_VARIANT}/sca.cmake)
Ddoc.cmake1 # SPDX-License-Identifier: Apache-2.0
9 # - extensions
10 # - python
11 # - west
12 # - root
13 # - zephyr_module
23 include(root)
/Zephyr-latest/soc/
DCMakeLists.txt1 # SPDX-License-Identifier: Apache-2.0
3 # FIXME: SHADOW_VARS: Remove this once we have enabled -Wshadow globally.
5 # Limit warning of shadow variables to in-tree SoC files for now.
30 # Include all SoC roots except Zephyr, as we are already in the Zephyr SoC root.
33 foreach(root ${local_soc_root})
34 cmake_path(GET root FILENAME name)
35 # A SoC root for HWMv1 may not contain a CMakeLists.txt file on this so
37 if(EXISTS ${root}/soc/CMakeLists.txt)
38 add_subdirectory(${root}/soc soc/${name})
/Zephyr-latest/subsys/usb/host/
Dusbh_core.c4 * SPDX-License-Identifier: Apache-2.0
37 if (event->type == UHC_EVT_EP_REQUEST) { in usbh_event_carrier()
51 if (ctx->root != NULL) { in dev_connected_handler()
53 usbh_device_free(ctx->root); in dev_connected_handler()
54 ctx->root = NULL; in dev_connected_handler()
57 ctx->root = usbh_device_alloc(ctx); in dev_connected_handler()
58 if (ctx->root == NULL) { in dev_connected_handler()
63 ctx->root->state = USB_STATE_DEFAULT; in dev_connected_handler()
65 if (event->type == UHC_EVT_DEV_CONNECTED_HS) { in dev_connected_handler()
66 ctx->root->speed = USB_SPEED_SPEED_HS; in dev_connected_handler()
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/Zephyr-latest/scripts/
Dlist_shields.py5 # SPDX-License-Identifier: Apache-2.0
31 for root in args.board_roots:
32 for shields in find_shields_in(root):
37 def find_shields_in(root): argument
38 shields = root / 'boards' / 'shields'
49 shield_name = file_name[:-len('.overlay')]
60 # Remember to update west-completion.bash if you add or remove
62 parser.add_argument("--board-root", dest='board_roots', default=[],
64 help='add a board root, may be given more than once')
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/
Dflexspi.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
16 clock_name_t root; in flexspi_clock_set_freq() local
35 return -ENOTSUP; in flexspi_clock_set_freq()
37 root = CLOCK_GetRootClockSource(flexspi_clk, in flexspi_clock_set_freq()
39 /* Get clock root frequency */ in flexspi_clock_set_freq()
40 root_rate = CLOCK_GetFreq(root); in flexspi_clock_set_freq()
41 /* Select a divider based on root clock frequency. We round the in flexspi_clock_set_freq()
45 divider = ((root_rate + (rate - 1)) / rate); in flexspi_clock_set_freq()
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dflexspi.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
16 clock_name_t root; in flexspi_clock_set_freq() local
35 return -ENOTSUP; in flexspi_clock_set_freq()
37 root = CLOCK_GetRootClockSource(flexspi_clk, in flexspi_clock_set_freq()
39 /* Get clock root frequency */ in flexspi_clock_set_freq()
40 root_rate = CLOCK_GetFreq(root); in flexspi_clock_set_freq()
41 /* Select a divider based on root clock frequency. We round the in flexspi_clock_set_freq()
45 divider = ((root_rate + (rate - 1)) / rate); in flexspi_clock_set_freq()
/Zephyr-latest/doc/develop/application/
Dapplication-kconfig.include1 # SPDX-License-Identifier: Apache-2.0
7 # Sources Kconfig.zephyr in the Zephyr root directory.
9 # Note: All 'source' statements work relative to the Zephyr root directory (due
12 # path relative to the Zephyr root).
/Zephyr-latest/scripts/footprint/
Dupload_data.py4 # SPDX-License-Identifier: Apache-2.0
56 parser.add_argument("-d", "--data", help="Data Directory")
57 …parser.add_argument("-y", "--dryrun", action="store_true", help="Dry run, do not upload to databas…
58 parser.add_argument("-z", "--zephyr-base", help="Zephyr tree")
59 parser.add_argument("-f", "--file", help="JSON file with footprint data")
67 root = importer.import_(contents['symbols'])
69 zr = find(root, lambda node: node.name == 'ZEPHYR_BASE')
70 ws = find(root, lambda node: node.name == 'WORKSPACE')
76 trees = [root]
78 for node in PreOrderIter(root, maxlevel=2):
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/Zephyr-latest/share/sysbuild/cmake/modules/
Dsysbuild_root.cmake1 # SPDX-License-Identifier: Apache-2.0
7 # This CMake module will convert all relative paths in existing ROOT lists to
11 # - ARCH_ROOT: CMake list of arch roots containing arch implementations
12 # - SOC_ROOT: CMake list of SoC roots containing SoC implementations
13 # - BOARD_ROOT: CMake list of board roots containing board and shield implementations
14 # - MODULE_EXT_ROOT: CMake list of module external roots containing module glue code
15 # - SCA_ROOT: CMake list of SCA roots containing static code analysis integration code
17 # If a root is defined it will check the list of paths in the root and convert
18 # any relative path to absolute path and update the root list.
19 # If a root is undefined it will still be undefined when this module has loaded.
/Zephyr-latest/soc/nxp/imx/imx8m/m4_mini/
Dsoc.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
17 /* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
77 * Switch AHB NOC root to 24M first in order to configure in SOC_ClockInit()
83 * Switch AXI M4 root to 24M first in order to configure in SOC_ClockInit()
94 /* Switch cortex-m4 to SYSTEM PLL1 */ in SOC_ClockInit()
101 /* Set root clock to 800MHZ/ 2= 400MHZ */ in SOC_ClockInit()
110 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
116 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
122 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
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/Zephyr-latest/scripts/dts/
Dgen_driver_kconfig_dts.py6 # SPDX-License-Identifier: Apache-2.0
22 # SPDX-License-Identifier: Apache-2.0"""
33 TO_UNDERSCORES = str.maketrans("-,.@/+", "______")
40 for root, _, filenames in os.walk(bindings_dir):
43 yield os.path.join(root, filename)
47 # Returns parsed command-line arguments
50 parser.add_argument("--kconfig-out", required=True,
52 parser.add_argument("--bindings-dirs", nargs='+', required=True,
65 with open(binding_path, encoding="utf-8") as f:
69 root = yaml.compose(f, Loader=SafeLoader)
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/Zephyr-latest/drivers/i2c/
Di2c_tca954x.c4 * SPDX-License-Identifier: Apache-2.0
29 const struct device *root; member
37 const struct tca954x_channel_config *channel_config = dev->config; in get_root_data_from_channel()
39 return channel_config->root->data; in get_root_data_from_channel()
45 const struct tca954x_channel_config *channel_config = dev->config; in get_root_config_from_channel()
47 return channel_config->root->config; in get_root_config_from_channel()
55 return i2c_configure(cfg->i2c.bus, dev_config); in tca954x_configure()
61 struct tca954x_root_data *data = dev->data; in tca954x_set_channel()
62 const struct tca954x_root_config *cfg = dev->config; in tca954x_set_channel()
65 if (data->selected_chan != select_mask) { in tca954x_set_channel()
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/Zephyr-latest/samples/boards/nordic/mesh/onoff_level_lighting_vnd_app/
DREADME.rst1 .. zephyr:code-sample:: nrf_bluetooth_mesh_onoff_level_lighting_vnd_app
3 :relevant-api: bt_mesh
10 which Root element has following models
12 - Generic OnOff Server
13 - Generic OnOff Client
14 - Generic Level Server
15 - Generic Level Client
16 - Generic Default Transition Time Server
17 - Generic Default Transition Time Client
18 - Generic Power OnOff Server
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/Zephyr-latest/soc/nxp/imx/imx8m/m7/
Dsoc.c4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
17 /* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
89 * and SYSTEM PLL3 by U-Boot. Therefore, there is no need to configure the system PLL again in SOC_ClockInit()
93 /* switch AHB NOC root to 24M first in order to configure the SYSTEM PLL1. */ in SOC_ClockInit()
96 /* switch AXI M7 root to 24M first in order to configure the SYSTEM PLL2. */ in SOC_ClockInit()
99 /* Set root clock to 800M */ in SOC_ClockInit()
101 /* switch cortex-m7 to SYSTEM PLL1 */ in SOC_ClockInit()
104 /* Set root clock freq to 133M / 1= 133MHZ */ in SOC_ClockInit()
113 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
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/Zephyr-latest/soc/nxp/imx/imx8m/m4_quad/
Dsoc.c2 * Copyright (c) 2021, Kwon Tae-young <tykwon@m2i.co.kr>
4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
17 /* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
52 * Switch AHB NOC root to 25M first in order to configure in SOC_ClockInit()
61 * Switch AXI M4 root to 25M first in order to configure in SOC_ClockInit()
66 /* Switch cortex-m4 to SYSTEM PLL1 DIV3 */ in SOC_ClockInit()
73 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
79 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
85 /* Set root clock to 80MHZ/ 1= 80MHZ */ in SOC_ClockInit()
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/Zephyr-latest/samples/net/sockets/http_server/src/certs/
Dgen_ca_cert.sh2 # SPDX-License-Identifier: Apache-2.0
4 # Generate a root CA private key
6 -name prime256v1 \
7 -genkey \
8 -out ca_privkey.pem
10 # Generate a root CA certificate using private key
12 -new \
13 -x509 \
14 -days 36500 \
15 -key ca_privkey.pem \
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/Zephyr-latest/lib/utils/
Drb.c4 * SPDX-License-Identifier: Apache-2.0
25 return n->children[1]; in get_child()
28 uintptr_t l = (uintptr_t) n->children[0]; in get_child()
38 n->children[1] = val; in set_child()
40 uintptr_t old = (uintptr_t) n->children[0]; in set_child()
43 n->children[0] = (void *) (new | (old & 1UL)); in set_child()
50 return ((uintptr_t)n->children[0]) & 1UL; in get_color()
67 uintptr_t *p = (void *) &n->children[0]; in set_color()
76 * contain at least tree->max_depth entries! Returns the number of
84 stack[sz] = tree->root; in find_and_stack()
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