1/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "frdm_mcxn947-pinctrl.dtsi"
8#include <zephyr/dt-bindings/i2c/i2c.h>
9#include <zephyr/dt-bindings/input/input-event-codes.h>
10
11/ {
12	aliases{
13		led0 = &red_led;
14		led1 = &green_led;
15		led2 = &blue_led;
16		sw0 = &user_button_2;
17		sw1 = &user_button_3;
18		sdhc0 = &usdhc0;
19		mcuboot-button0 = &user_button_2;
20	};
21
22	leds {
23		compatible = "gpio-leds";
24		green_led: led_1 {
25			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
26			label = "Green LED";
27			status = "disabled";
28		};
29		blue_led: led_2 {
30			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
31			label = "Blue LED";
32			status = "disabled";
33		};
34		red_led: led_3 {
35			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
36			label = "Red LED";
37			status = "disabled";
38		};
39	};
40
41	gpio_keys {
42		compatible = "gpio-keys";
43		user_button_2: button_0 {
44			label = "User SW2";
45			gpios = <&gpio0 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
46			zephyr,code = <INPUT_KEY_0>;
47			status = "disabled";
48		};
49		user_button_3: button_1 {
50			label = "User SW3";
51			gpios = <&gpio0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
52			zephyr,code = <INPUT_KEY_1>;
53			status = "disabled";
54		};
55	};
56
57	/*
58	 * This node describes the GPIO pins of the LCD-PAR-S035 panel 8080 interface.
59	 */
60	nxp_lcd_8080_connector: lcd-8080-connector {
61		compatible = "nxp,lcd-8080";
62		#gpio-cells = <2>;
63		gpio-map-mask = <0xffffffff 0xffffffc0>;
64		gpio-map-pass-thru = <0 0x3f>;
65		gpio-map =	<9  0 &gpio4 6 0>,	/* Pin 9, LCD touch INT */
66				<10  0 &gpio4 5 0>,	/* Pin 10, LCD backlight control */
67				<11  0 &gpio4 7 0>;	/* Pin 11, LCD and touch reset */
68	};
69};
70
71&flexcomm1_lpspi1 {
72	pinctrl-0 = <&pinmux_flexcomm1_lpspi>;
73	pinctrl-names = "default";
74};
75
76nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 {
77	pinctrl-0 = <&pinmux_flexcomm2_lpi2c>;
78	pinctrl-names = "default";
79	clock-frequency = <I2C_BITRATE_STANDARD>;
80};
81
82&flexcomm2_lpuart2 {
83	current-speed = <115200>;
84	pinctrl-0 = <&pinmux_flexcomm2_lpuart>;
85	pinctrl-names = "default";
86};
87
88&flexcomm4_lpuart4 {
89	current-speed = <115200>;
90	pinctrl-0 = <&pinmux_flexcomm4_lpuart>;
91	pinctrl-names = "default";
92};
93
94&flexcomm7_lpi2c7 {
95	pinctrl-0 = <&pinmux_flexcomm7_lpi2c>;
96	pinctrl-names = "default";
97	clock-frequency = <I2C_BITRATE_STANDARD>;
98	ov7670: ov7670@21 {
99		compatible = "ovti,ov7670";
100		reset-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
101		pwdn-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
102		reg = <0x21>;
103	};
104};
105
106/* SmartDMA is used for video driver on this board */
107&smartdma {
108	status = "okay";
109	program-mem = <0x4000000>;
110	video_sdma: video-sdma {
111		status = "okay";
112		compatible = "nxp,video-smartdma";
113		pinctrl-0 = <&pinmux_smartdma_camera>;
114		pinctrl-names = "default";
115		sensor = <&ov7670>;
116		vsync-pin = <4>;
117		hsync-pin = <11>;
118		pclk-pin = <5>;
119	};
120};
121
122/*
123 * MCXN947 board uses OS timer as the kernel timer
124 * In case we need to switch to SYSTICK timer, then
125 * replace &os_timer with &systick
126 */
127&os_timer {
128	status = "disabled";
129};
130
131&systick {
132	status = "okay";
133};
134
135&sram {
136	sramg: memory@20050000 {
137		compatible = "mmio-sram";
138		reg = <0x20050000 DT_SIZE_K(64)>;
139	};
140	sramh: memory@20060000 {
141		compatible = "mmio-sram";
142		reg = <0x20060000 DT_SIZE_K(32)>;
143	};
144};
145
146&flash {
147	partitions {
148		compatible = "fixed-partitions";
149		#address-cells = <1>;
150		#size-cells = <1>;
151
152		/*
153		 * Partition sizes must be aligned
154		 * to the flash memory sector size of 8KB.
155		 */
156		boot_partition: partition@0 {
157			label = "mcuboot";
158			reg = <0x00000000 DT_SIZE_K(80)>;
159		};
160		/* For the MCUBoot "upgrade only" method,
161		 * the slot sizes must be equal.
162		 */
163		slot0_partition: partition@14000 {
164			label = "image-0";
165			reg = <0x00014000 DT_SIZE_K(984)>;
166		};
167		slot1_partition: partition@10A000 {
168			label = "image-1";
169			reg = <0x0010A000 DT_SIZE_K(984)>;
170		};
171		/* storage_partition is placed in WINBOND flash memory*/
172	};
173};
174
175&flexspi {
176	pinctrl-0 = <&pinmux_flexspi>;
177	pinctrl-names = "default";
178	ahb-prefetch;
179	ahb-bufferable;
180	ahb-cacheable;
181	ahb-read-addr-opt;
182	combination-mode;
183	rx-clock-source = <1>;
184
185	/* WINBOND flash memory*/
186	w25q64jvssiq: w25q64jvssiq@0 {
187		compatible = "nxp,imx-flexspi-nor";
188		status = "disabled";
189		size = <67108864>;
190		reg = <0>;
191		spi-max-frequency = <133000000>;
192		jedec-id = [ef 40 17];
193		erase-block-size = <4096>;
194		write-block-size = <1>;
195		cs-interval-unit = <1>;
196		cs-interval = <2>;
197		cs-hold-time = <3>;
198		cs-setup-time = <3>;
199		data-valid-time = <2>;
200		column-space = <0>;
201	};
202};
203
204&dac0 {
205	pinctrl-0 = <&pinmux_dac0>;
206	pinctrl-names = "default";
207};
208
209&sai1 {
210	pinctrl-0 = <&pinmux_sai1>;
211	pinctrl-names = "default";
212};
213
214&sai0 {
215	pinctrl-0 = <&pinmux_sai0>;
216	pinctrl-names = "default";
217};
218
219&enet {
220	pinctrl-0 = <&pinmux_enet_qos>;
221	pinctrl-names = "default";
222};
223
224&enet_mac {
225	phy-connection-type = "rmii";
226	zephyr,random-mac-address;
227	phy-handle = <&phy>;
228};
229
230&enet_mdio {
231	phy: ethernet-phy@0 {
232		compatible = "ethernet-phy";
233		reg = <0>;
234		status = "okay";
235	};
236};
237
238&flexpwm1_pwm0 {
239	pinctrl-0 = <&pinmux_flexpwm1_pwm0>;
240	pinctrl-names = "default";
241};
242
243&usdhc0 {
244	pinctrl-0 = <&pinmux_usdhc0>;
245	pinctrl-1 = <&pinmux_usdhc0>;
246	pinctrl-2 = <&pinmux_usdhc0>;
247	cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
248	pinctrl-names = "default", "slow", "med";
249	no-1-8-v;
250};
251
252&lpadc0 {
253	pinctrl-0 = <&pinmux_lpadc0>;
254	pinctrl-names = "default";
255};
256
257zephyr_mipi_dbi_parallel: &flexio0_lcd {
258	/* DMA channels 0, muxed to FlexIO TX */
259	dmas = <&edma0 0 61>;
260	dma-names = "tx";
261	shifters-count = <8>;
262	timers-count = <1>;
263	enwr-pin = <1>;
264	rd-pin = <0>;
265	data-pin-start = <16>;
266	reset-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
267	cs-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
268	rs-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
269	pinctrl-0 = <&pinmux_flexio_lcd>;
270	pinctrl-names = "default";
271};
272
273&lpcmp0 {
274	pinctrl-0 = <&pinmux_lpcmp0>;
275	pinctrl-names = "default";
276};
277
278&i3c1 {
279	pinctrl-0 = <&pinmux_i3c1>;
280	pinctrl-names = "default";
281};
282
283&flexcan0 {
284	pinctrl-0 = <&pinmux_flexcan0>;
285	pinctrl-names = "default";
286};
287
288&sc_timer {
289	pinctrl-0 = <&pinmux_sctimer>;
290	pinctrl-names = "default";
291};
292