1 /*
2  * Copyright (c) 2023 ENE Technology Inc.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #define DT_DRV_COMPAT ene_kb1200_gpio
8 
9 #include <zephyr/drivers/gpio.h>
10 #include <zephyr/kernel.h>
11 #include <zephyr/drivers/gpio/gpio_utils.h>
12 #include <zephyr/sys/util_macro.h>
13 #include <zephyr/dt-bindings/gpio/ene-kb1200-gpio.h>
14 #include <reg/gpio.h>
15 #include <reg/gptd.h>
16 
17 struct gpio_kb1200_data {
18 	/* gpio_driver_data needs to be first */
19 	struct gpio_driver_data common;
20 	sys_slist_t cb;
21 };
22 
23 struct gpio_kb1200_config {
24 	/* gpio_driver_config needs to be first */
25 	struct gpio_driver_config common;
26 	/* base address of GPIO port */
27 	struct gpio_regs *gpio_regs;
28 	struct gptd_regs *gptd_regs;
29 };
30 
gpio_kb1200_isr(const struct device * dev)31 static void gpio_kb1200_isr(const struct device *dev)
32 {
33 	const struct gpio_kb1200_config *config = dev->config;
34 	struct gpio_kb1200_data *context = dev->data;
35 	uint32_t pending_flag = config->gptd_regs->GPTDPF;
36 
37 	gpio_fire_callbacks(&context->cb, dev, pending_flag);
38 	config->gptd_regs->GPTDPF |= pending_flag;
39 }
40 
kb1200_gpio_pin_configure(const struct device * dev,gpio_pin_t pin,gpio_flags_t flags)41 static int kb1200_gpio_pin_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
42 {
43 	const struct gpio_kb1200_config *config = dev->config;
44 
45 	WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0);
46 	/* ene specific flags. low voltage mode,input voltage threshold (ViH & ViL) support 1.8V */
47 	if (flags & KB1200_GPIO_VOLTAGE_POS) {
48 		WRITE_BIT(config->gpio_regs->GPIOLV, pin, 1);
49 	} else {
50 		WRITE_BIT(config->gpio_regs->GPIOLV, pin, 0);
51 	}
52 	/* ene specific flags. max current driving ability, max support 16 mA */
53 	if (flags & KB1200_GPIO_DRIVING_16MA) {
54 		WRITE_BIT(config->gpio_regs->GPIODC, pin, 1);
55 	} else {
56 		WRITE_BIT(config->gpio_regs->GPIODC, pin, 0);
57 	}
58 	/* pull-up function */
59 	if (flags & GPIO_PULL_UP) {
60 		WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1);
61 	} else {
62 		WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0);
63 	}
64 	/* output data high/low */
65 	if (flags & GPIO_OUTPUT_INIT_HIGH) {
66 		WRITE_BIT(config->gpio_regs->GPIOD, pin, 1);
67 	} else if (flags & GPIO_OUTPUT_INIT_LOW) {
68 		WRITE_BIT(config->gpio_regs->GPIOD, pin, 0);
69 	}
70 	/* output enable function */
71 	if (flags & GPIO_OUTPUT) {
72 		/* setting open-drain only when output is enabled */
73 		/* output type push-pull/open-drain */
74 		if (flags & GPIO_SINGLE_ENDED) {
75 			if (flags & GPIO_LINE_OPEN_DRAIN) {
76 				WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1);
77 			} else {
78 				WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0);
79 			}
80 		} else {
81 			WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0);
82 		}
83 		WRITE_BIT(config->gpio_regs->GPIOOE, pin, 1);
84 	} else {
85 		WRITE_BIT(config->gpio_regs->GPIOOE, pin, 0);
86 		/* disable open-drain when output is disabled */
87 		WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0);
88 	}
89 	/* input function always enable */
90 	WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1);
91 	return 0;
92 }
93 
kb1200_gpio_port_get_raw(const struct device * dev,gpio_port_value_t * value)94 static int kb1200_gpio_port_get_raw(const struct device *dev, gpio_port_value_t *value)
95 {
96 	const struct gpio_kb1200_config *config = dev->config;
97 
98 	*value = config->gpio_regs->GPIOIN;
99 	return 0;
100 }
101 
kb1200_gpio_port_set_masked_raw(const struct device * dev,gpio_port_pins_t mask,gpio_port_value_t value)102 static int kb1200_gpio_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask,
103 					   gpio_port_value_t value)
104 {
105 	const struct gpio_kb1200_config *config = dev->config;
106 
107 	config->gpio_regs->GPIOD |= (value & mask);
108 	return 0;
109 }
110 
kb1200_gpio_port_set_bits_raw(const struct device * dev,gpio_port_pins_t pins)111 static int kb1200_gpio_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins)
112 {
113 	const struct gpio_kb1200_config *config = dev->config;
114 
115 	config->gpio_regs->GPIOD |= pins;
116 	return 0;
117 }
118 
kb1200_gpio_port_clear_bits_raw(const struct device * dev,gpio_port_pins_t pins)119 static int kb1200_gpio_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins)
120 {
121 	const struct gpio_kb1200_config *config = dev->config;
122 
123 	config->gpio_regs->GPIOD &= ~pins;
124 	return 0;
125 }
126 
kb1200_gpio_port_toggle_bits(const struct device * dev,gpio_port_pins_t pins)127 static int kb1200_gpio_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
128 {
129 	const struct gpio_kb1200_config *config = dev->config;
130 
131 	config->gpio_regs->GPIOD ^= pins;
132 	return 0;
133 }
134 
kb1200_gpio_pin_interrupt_configure(const struct device * dev,gpio_pin_t pin,enum gpio_int_mode mode,enum gpio_int_trig trig)135 static int kb1200_gpio_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
136 					       enum gpio_int_mode mode, enum gpio_int_trig trig)
137 {
138 	const struct gpio_kb1200_config *config = dev->config;
139 
140 	/* Check if GPIO port needs interrupt support */
141 	if ((mode & GPIO_INT_DISABLE) || (mode & GPIO_INT_ENABLE) == 0) {
142 		/* Set the mask to disable the interrupt */
143 		WRITE_BIT(config->gptd_regs->GPTDIE, pin, 0);
144 	} else {
145 		if (mode & GPIO_INT_EDGE) {
146 			WRITE_BIT(config->gptd_regs->GPTDEL, pin, 0);
147 			if (trig & GPIO_INT_HIGH_1) {
148 				if (trig & GPIO_INT_LOW_0) { /* Falling & Rising edge trigger */
149 					/* Enable toggle trigger */
150 					WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 1);
151 				} else { /* Rising edge */
152 					/* Disable toggle trigger */
153 					WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
154 					WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1);
155 				}
156 			} else { /* Falling edge */
157 				/* Disable Toggle trigger */
158 				WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
159 				WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0);
160 			}
161 		} else {
162 			WRITE_BIT(config->gptd_regs->GPTDEL, pin, 1);
163 			/* Disable Toggle trigger */
164 			WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
165 			if (trig & GPIO_INT_HIGH_1) {
166 				WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1);
167 			} else {
168 				WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0);
169 			}
170 		}
171 		/* clear pending flag */
172 		WRITE_BIT(config->gptd_regs->GPTDPF, pin, 1);
173 		/* Enable the interrupt */
174 		WRITE_BIT(config->gptd_regs->GPTDIE, pin, 1);
175 	}
176 	return 0;
177 }
178 
kb1200_gpio_manage_callback(const struct device * dev,struct gpio_callback * cb,bool set)179 static int kb1200_gpio_manage_callback(const struct device *dev, struct gpio_callback *cb, bool set)
180 {
181 	struct gpio_kb1200_data *context = dev->data;
182 
183 	gpio_manage_callback(&context->cb, cb, set);
184 	return 0;
185 }
186 
kb1200_gpio_get_pending_int(const struct device * dev)187 static uint32_t kb1200_gpio_get_pending_int(const struct device *dev)
188 {
189 	const struct gpio_kb1200_config *const config = dev->config;
190 
191 	return config->gptd_regs->GPTDPF;
192 }
193 
194 static DEVICE_API(gpio, kb1200_gpio_api) = {
195 	.pin_configure = kb1200_gpio_pin_configure,
196 	.port_get_raw = kb1200_gpio_port_get_raw,
197 	.port_set_masked_raw = kb1200_gpio_port_set_masked_raw,
198 	.port_set_bits_raw = kb1200_gpio_port_set_bits_raw,
199 	.port_clear_bits_raw = kb1200_gpio_port_clear_bits_raw,
200 	.port_toggle_bits = kb1200_gpio_port_toggle_bits,
201 	.pin_interrupt_configure = kb1200_gpio_pin_interrupt_configure,
202 	.manage_callback = kb1200_gpio_manage_callback,
203 	.get_pending_int = kb1200_gpio_get_pending_int,
204 };
205 
206 #define KB1200_GPIO_INIT(n)                                                                        \
207 	static int kb1200_gpio_##n##_init(const struct device *dev)                                \
208 	{                                                                                          \
209 		IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 0, irq), DT_INST_IRQ_BY_IDX(n, 0, priority),     \
210 			    gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0);                            \
211 		irq_enable(DT_INST_IRQ_BY_IDX(n, 0, irq));                                         \
212 		IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 1, irq), DT_INST_IRQ_BY_IDX(n, 1, priority),     \
213 			    gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0);                            \
214 		irq_enable(DT_INST_IRQ_BY_IDX(n, 1, irq));                                         \
215 		return 0;                                                                          \
216 	};                                                                                         \
217 	static const struct gpio_kb1200_config port_##n##_kb1200_config = {                        \
218 		.common = {.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n)},                   \
219 		.gpio_regs = (struct gpio_regs *)DT_INST_REG_ADDR_BY_IDX(n, 0),                    \
220 		.gptd_regs = (struct gptd_regs *)DT_INST_REG_ADDR_BY_IDX(n, 1),                    \
221 	};                                                                                         \
222 	static struct gpio_kb1200_data gpio_kb1200_##n##_data;                                     \
223 	DEVICE_DT_INST_DEFINE(n, kb1200_gpio_##n##_init, NULL, &gpio_kb1200_##n##_data,            \
224 			      &port_##n##_kb1200_config, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,  \
225 			      &kb1200_gpio_api);
226 
227 DT_INST_FOREACH_STATUS_OKAY(KB1200_GPIO_INIT)
228