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/hal_microchip-latest/pic32c/pic32cxsg/include/fixups/
Dadc_fixup_pic32cxsg.h87 # define ADC_FUSES_PREFIX(n) ADC_ argument
89 # define ADC_FUSES_PREFIX(n) UTIL_CAT(AD, UTIL_CAT(C, UTIL_CAT(n, _))) argument
93 # define ADC_SAM0_BIASCOMP(n) ADC_SAM0_CALIB(ADC_FUSES_PREFIX(n), BIASCOMP) argument
95 # define ADC_SAM0_BIASCOMP(n) 0 argument
99 # define ADC_SAM0_BIASR2R(n) ADC_SAM0_CALIB(ADC_FUSES_PREFIX(n), BIASR2R) argument
101 # define ADC_SAM0_BIASR2R(n) 0 argument
105 # define ADC_SAM0_BIASREFBUF(n) ADC_SAM0_CALIB(ADC_FUSES_PREFIX(n), BIASREFBUF) argument
107 # define ADC_SAM0_BIASREFBUF(n) 0 argument
/hal_microchip-latest/mec/mec1501/component/
Dadc.h96 #define MCHP_ADC_STATUS_CHAN(n) BIT(n) argument
102 #define MCHP_ADC_SCS_CH(n) BIT((n) & 0x07) argument
108 #define MCHP_ADC_RCS_CH(n) BIT((n) & 0x07) argument
134 #define MCHP_ADC_CH_VREF_SEL_MASK(n) (0x03u << (((n) & 0x07) << 1)) argument
135 #define MCHP_ADC_CH_VREF_SEL_PAD(n) 0u argument
136 #define MCHP_ADC_CH_VREF_SEL_GPIO(n) (0x01u << (((n) & 0x07) << 1)) argument
178 #define MCHP_ADC_CH_NUM(n) ((n) & MCHP_ADC_MAX_CHAN_MASK) argument
179 #define MCHP_ADC_CH_OFS(n) (MCHP_ADC_CH_NUM(n) << 2) argument
180 #define MCHP_ADC_CH_ADDR(n) (MCHP_ADC_BASE_ADDR + MCHP_ADC_CH_OFS(n)) argument
182 #define MCHP_ADC_RD_CHAN(n) REG32(MCHP_ADC_CH_ADDR(n)) argument
Dpwm.h51 #define MCHP_PWM_ADDR(n) (MCHP_PWM_BASE_ADDR + \ argument
102 #define MCHP_PWM_CFG_CLK_PRE_DIV(n) ( \ argument
114 #define MCHP_PWM_COUNT_ON(n) \ argument
117 #define MCHP_PWM_COUNT_OFF(n) \ argument
120 #define MCHP_PWM_CONFIG(n) \ argument
Decia.h67 #define MCHP_NVIC_SET_EN(n) \ argument
70 #define MCHP_NVIC_CLR_EN(n) \ argument
73 #define MCHP_NVIC_SET_PEND(n) \ argument
76 #define MCHP_NVIC_CLR_PEND(n) \ argument
144 #define MCHP_GIRQ_TO_AGGR_NVIC(n) (((n) < 23) ? ((n)-8) : ((n)-9)) argument
147 #define MCHP_GIRQ_SRC_ADDR(n) \ argument
150 #define MCHP_GIRQ_ENSET_ADDR(n) \ argument
153 #define MCHP_GIRQ_RESULT_ADDR(n) \ argument
156 #define MCHP_GIRQ_ENCLR_ADDR(n) \ argument
271 #define MCHP_GIRQ_BLK_SETEN(n) \ argument
[all …]
Dacpi_ec.h57 #define MCHP_ACPI_EC_ADDR(n) (MCHP_ACPI_EC_BASE_ADDR +\ argument
95 #define MCHP_ACPI_EC_IBF_NVIC(n) (45u + ((uint32_t)(n) << 1)) argument
96 #define MCHP_ACPI_EC_OBE_NVIC(n) (46u + ((uint32_t)(n) << 1)) argument
97 #define MCHP_ACPI_EC_IBF_GIRQ_POS(n) (5u + ((uint32_t)(n) << 1)) argument
98 #define MCHP_ACPI_EC_OBE_GIRQ_POS(n) (6u + ((uint32_t)(n) << 1)) argument
99 #define MCHP_ACPI_EC_IBF_GIRQ(n) (1u << MCHP_ACPI_EC_IBF_GIRQ_POS(n)) argument
100 #define MCHP_ACPI_EC_OBE_GIRQ(n) (1u << MCHP_ACPI_EC_OBE_GIRQ_POS(n)) argument
Dpcr.h93 #define MCHP_PCR_SLP_EN_ADDR(n) \ argument
95 #define MCHP_PCR_CLK_REQ_ADDR(n) \ argument
97 #define MCHP_PCR_PERIPH_RESET_ADDR(n) \ argument
339 #define MCHP_PCR_SLP_EN(n) REG32(MCHP_PCR_SLP_EN_ADDR(n)) argument
340 #define MCHP_PCR_CLK_REQ_RO(n) REG32(MCHP_PCR_CLK_REQ_ADDR(n)) argument
351 #define MCHP_PCR_PERIPH_RST(n) REG32(MCHP_PCR_PERIPH_RESET_ADDR(n)) argument
353 #define MCHP_PCR_DEV_SLP_EN_CLR(n, b) \ argument
356 #define MCHP_PCR_DEV_SLP_EN_SET(n, b) \ argument
Dqmspi.h103 #define MCHP_QMSPI_DESCR_OFS(n) (0x30u + ((uint32_t)(n) * 4U)) argument
118 #define MCHP_QMSPI_DESCR_ADDR(n) \ argument
158 #define MCHP_QMSPI_M_CS(n) \ argument
209 #define MCHP_QMSPI_C_DESCR(n) (((uint32_t)(n) & \ argument
213 #define MCHP_QMSPI_C_NEXT_DESCR(n) (((uint32_t)(n) & \ argument
227 #define MCHP_QMSPI_C_XFR_NUNITS(n) ((uint32_t)(n) << \ argument
229 #define MCHP_QMSPI_C_XFR_NUNITS_GET(n) (((uint32_t)(n) >> \ argument
Despi_vw.h68 #define ESPI_M2SW1_SRC_SEL_POS(n) ((n) << 3) argument
69 #define ESPI_M2SW1_SRC_SEL_MASK(n) ((0x0fu) << (ESPI_M2SW1_SRC_SEL_POS(n))) argument
70 #define ESPI_M2SW1_SRC_SEL_VAL(n, v) (((uint32_t)(v) & 0x0fu) << (ESPI_M2SW1_SRC_SEL_POS(n))) argument
83 #define ESPI_M2SW2_SRC_POS(n) ((n) << 3) argument
84 #define ESPI_M2SW2_SRC_MASK(n) ((ESPI_M2SW2_SRC_MASK0) << (ESPI_M2SW2_SRC_POS(n))) argument
85 #define ESPI_M2SW2_SRC_VAL(n, v) (((uint32_t)(v) & 0x0fu) << (ESPI_M2SW2_SRC_POS(n))) argument
135 #define ESPI_S2MW1_CHG_POS(n) ((n) + 16u) argument
136 #define ESPI_S2MW1_CHG(v, n) (((uint32_t)(v) >> ESPI_S2MW1_CHG_POS(n)) & 0x01) argument
149 #define ESPI_S2MW1_SRC_POS(n) ((n) << 3) argument
150 #define ESPI_S2MW1_SRC(v, n) (((uint32_t)(v) & 0x01) << (ESPI_S2MW1_SRC_POS(n))) argument
Dtimer.h57 #define MCHP_B16TMR_ADDR(n) \ argument
64 #define MCHP_B32TMR_ADDR(n) \ argument
185 #define MCHP_HTMR_ADDR(n) \ argument
Dtach.h51 #define MCHP_TACH_ADDR(n) (MCHP_TACH_BASE_ADDR + \ argument
Dled.h145 #define MCHP_LED_ADDR(n) \ argument
Dgpio.h60 #define MCHP_GPIO_CTRL_ADDR(n) \ argument
63 #define MCHP_GPIO_CTRL2_ADDR(n) \ argument
77 #define MCHP_GPIO_PARIN_ADDR(n) ((uintptr_t)(MCHP_GPIO_BASE_ADDR) +\ argument
108 #define MCHP_GPIO_PAROUT_ADDR(n) ((uintptr_t)(MCHP_GPIO_BASE_ADDR) +\ argument
Duart.h56 #define MCHP_UART_BASE_ADDR(n) \ argument
Di2c.h50 #define MCHP_I2C_BASE_ADDR(n) \ argument
/hal_microchip-latest/mec5/drivers/
Dmec_defs.h15 #define BIT_n_MASK(n) (1U << (n)) argument
50 #define MEC_BIT(n) (1ul << (n)) argument
54 #define MEC_BIT32(n) (1ul << (n)) argument
58 #define MEC_BIT64(n) (1ULL << (n)) argument
128 #define MEC_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) argument
Dmec_eeprom.c232 for (uint32_t n = 0; n < nbytes; n++) { in mec_hal_eeprom_buffer_rd() local
254 for (uint32_t n = 0; n < nbytes; n++) { in mec_hal_eeprom_buffer_wr() local
Dmec_ecia.c267 for (uint32_t n = MEC5_ECIA_FIRST_GIRQ_NOS; n < MEC5_ECIA_LAST_GIRQ_NOS; n++) { in enable_nvic_aggregated() local
283 for (size_t n = 0; n < MEC5_ECIA_NUM_GIRQS; n++) { in enable_nvic_directs() local
343 for (uint32_t n = 0; n < MEC5_NVIC_NUM_IP_REGS; n++) { in set_all_pri() local
Dmec_qspi.c63 for (size_t n = 0u; n < MEC5_QSPI_INSTANCES; n++) { in qspi_get_info() local
1048 for (size_t n = 0; n < MEC5_QSPI_NUM_DESCRS; n++) { in mec_hal_qspi_context_init() local
1323 uint32_t didx, didx_lim, n; in mec_hal_qspi_load_descrs_at() local
Dmec_bdp.c273 for (uint8_t n = 0; n < 4; n++) { in mec_hal_bdp_get_host_io() local
Dmec_pwm.c62 for (size_t n = 0u; n < MEC5_PWM_INSTANCES; n++) { in get_pwm_info() local
Dmec_gpio.c83 #define GPIO_VCI_PIN(n) (((n) & 0x7u) << 4) argument
518 for (size_t n = 0; n < nprops; n++) { in mec_hal_gpio_set_props() local
Dmec_uart.c768 size_t n = 0u; in mec_hal_uart_tx() local
/hal_microchip-latest/mec/common/
Dmec_defs.h37 #define BIT(n) (1ul << (n)) argument
41 #define SHLU32(v, n) ((unsigned long)(v) << (n)) argument
/hal_microchip-latest/mec/mec1501/
DMEC1501hsz.h318 #define DMA_CHAN_BASE(n) (DMA_BASE + (((n)+1)<<6)) argument
333 #define SMB_BASE(n) (PERIPH_BASE + 0x4000u + ((n)<<10)) argument
339 #define I2C_BASE(n) (PERIPH_BASE + 0x5100u + ((n)<<8)) argument
343 #define PWM_BASE(n) (PERIPH_BASE + 0x5800u + ((n)<<4)) argument
353 #define TACH_BASE(n) (PERIPH_BASE + 0x6000u + ((n)<<4)) argument
389 #define ACPI_EC_BASE(n) (PERIPH_BASE + 0xf0800u + ((n)<<10)) argument
396 #define UART_BASE(n) (PERIPH_BASE + 0xf2400u + ((n)<<10)) argument
/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_nwc_init.c369 void delay(uint32_t n) in delay()

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