1 /* 2 * Copyright (c) 2017 Intel Corporation 3 * Copyright (c) 2018 PHYTEC Messtechnik GmbH 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #ifndef ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_ 9 #define ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_ 10 11 #include <zephyr/drivers/gpio.h> 12 13 #define APDS9253_MAIN_CTRL_REG 0x00 14 #define APDS9253_MAIN_CTRL_REG_MASK GENMASK(5, 0) 15 #define APDS9253_MAIN_CTRL_SAI_LS BIT(5) 16 #define APDS9253_MAIN_CTRL_SW_RESET BIT(4) 17 #define APDS9253_MAIN_CTRL_RGB_MODE BIT(2) 18 #define APDS9253_MAIN_CTRL_LS_EN BIT(1) 19 20 #define APDS9253_LS_MEAS_RATE_REG 0x04 21 #define APDS9253_LS_MEAS_RATE_RES_MASK GENMASK(6, 4) 22 #define APDS9253_LS_MEAS_RATE_RES_20BIT_400MS 0 23 #define APDS9253_LS_MEAS_RATE_RES_19BIT_200MS BIT(4) 24 #define APDS9253_LS_MEAS_RATE_RES_18BIT_100MS BIT(5) /* default */ 25 #define APDS9253_LS_MEAS_RATE_RES_17BIT_50MS (BIT(5) | BIT(4)) 26 #define APDS9253_LS_MEAS_RATE_RES_16BIT_25MS BIT(6) 27 #define APDS9253_LS_MEAS_RATE_RES_13_3MS (BIT(6) | BIT(4)) 28 #define APDS9253_LS_MEAS_RATE_MES_MASK GENMASK(2, 0) 29 #define APDS9253_LS_MEAS_RATE_MES_2000MS (BIT(2) | BIT(1) | BIT(0)) 30 #define APDS9253_LS_MEAS_RATE_MES_1000MS (BIT(2) | BIT(0)) 31 #define APDS9253_LS_MEAS_RATE_MES_500MS BIT(2) 32 #define APDS9253_LS_MEAS_RATE_MES_200MS (BIT(1) | BIT(0)) 33 #define APDS9253_LS_MEAS_RATE_MES_100MS BIT(1) /* default */ 34 #define APDS9253_LS_MEAS_RATE_MES_50MS BIT(0) 35 #define APDS9253_LS_MEAS_RATE_MES_25MS 0 36 37 #define APDS9253_LS_GAIN_REG 0x05 38 #define APDS9253_LS_GAIN_MASK GENMASK(2, 0) 39 #define APDS9253_LS_GAIN_RANGE_18 BIT(2) 40 #define APDS9253_LS_GAIN_RANGE_9 (BIT(1) | BIT(0)) 41 #define APDS9253_LS_GAIN_RANGE_6 BIT(1) 42 #define APDS9253_LS_GAIN_RANGE_3 BIT(0) /* default */ 43 #define APDS9253_LS_GAIN_RANGE_1 0 44 45 #define APDS9253_PART_ID 0x06 46 #define APDS9253_DEVICE_PART_ID 0xC0 47 #define APDS9253_PART_ID_REV_MASK GENMASK(3, 0) 48 #define APDS9253_PART_ID_ID_MASK GENMASK(7, 4) 49 50 #define APDS9253_MAIN_STATUS_REG 0x07 51 #define APDS9253_MAIN_STATUS_POWER_ON BIT(5) 52 #define APDS9253_MAIN_STATUS_LS_INTERRUPT BIT(4) 53 #define APDS9253_MAIN_STATUS_LS_STATUS BIT(3) 54 55 /* Channels data */ 56 #define APDS9253_LS_DATA_BASE 0x0A 57 #define APDS9253_LS_DATA_IR_0 0x0A 58 #define APDS9253_LS_DATA_IR_1 0x0B 59 #define APDS9253_LS_DATA_IR_2 0x0C 60 #define APDS9253_LS_DATA_GREEN_0 0x0D 61 #define APDS9253_LS_DATA_GREEN_1 0x0E 62 #define APDS9253_LS_DATA_GREEN_2 0x0F 63 #define APDS9253_LS_DATA_BLUE_0 0x10 64 #define APDS9253_LS_DATA_BLUE_1 0x11 65 #define APDS9253_LS_DATA_BLUE_2 0x12 66 #define APDS9253_LS_DATA_RED_0 0x13 67 #define APDS9253_LS_DATA_RED_1 0x14 68 #define APDS9253_LS_DATA_RED_2 0x15 69 70 #define APDS9253_INT_CFG 0x19 71 #define APDS9253_INT_CFG_LS_INT_SEL_IR 0 72 #define APDS9253_INT_CFG_LS_INT_SEL_ALS BIT(4) /* default */ 73 #define APDS9253_INT_CFG_LS_INT_SEL_RED BIT(5) 74 #define APDS9253_INT_CFG_LS_INT_SEL_BLUE (BIT(5) | BIT(4)) 75 #define APDS9253_INT_CFG_LS_VAR_MODE_EN BIT(3) 76 #define APDS9253_INT_CFG_LS_INT_MODE_EN BIT(3) 77 78 #define APDS9253_INT_PST 0x1A 79 #define APDS9253_LS_THRES_UP_0 0x21 80 #define APDS9253_LS_THRES_UP_1 0x22 81 #define APDS9253_LS_THRES_UP_2 0x23 82 #define APDS9253_LS_THRES_LOW_0 0x24 83 #define APDS9253_LS_THRES_LOW_1 0x25 84 #define APDS9253_LS_THRES_LOW_2 0x26 85 #define APDS9253_LS_THRES_VAR 0x27 86 #define APDS9253_DK_CNT_STOR 0x29 87 88 struct apds9253_config { 89 struct i2c_dt_spec i2c; 90 struct gpio_dt_spec int_gpio; 91 uint8_t ls_gain; 92 uint8_t ls_rate; 93 uint8_t ls_resolution; 94 bool interrupt_enabled; 95 }; 96 97 struct apds9253_data { 98 struct gpio_callback gpio_cb; 99 struct k_work work; 100 const struct device *dev; 101 uint32_t sample_crgb[4]; 102 uint8_t pdata; 103 struct k_sem data_sem; 104 }; 105 106 #endif /* ZEPHYR_DRIVERS_SENSOR_APDS9253_APDS9253_H_*/ 107
