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Searched defs:XCHAL_ICACHE_ACCESS_SIZE (Results 1 – 15 of 15) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h203 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h301 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h301 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h301 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h271 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h301 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h294 #define XCHAL_ICACHE_ACCESS_SIZE 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h271 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h299 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h383 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h383 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h376 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h362 #define XCHAL_ICACHE_ACCESS_SIZE 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h383 #define XCHAL_ICACHE_ACCESS_SIZE 16 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h381 #define XCHAL_ICACHE_ACCESS_SIZE 1 macro