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Searched defs:TIM_DCR_DBSS_0 (Results 1 – 25 of 31) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h8905 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32wba54xx.h13781 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32wba52xx.h13073 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32wba5mxx.h13799 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32wba55xx.h13799 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7391 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32h523xx.h9830 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32h533xx.h10239 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32h562xx.h10556 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32h573xx.h13049 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
Dstm32h563xx.h12640 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h10937 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u535xx.h10537 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u575xx.h11560 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u585xx.h12009 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u595xx.h11870 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u5a5xx.h12319 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u5f7xx.h13368 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u599xx.h15589 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u5g7xx.h13817 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32u5f9xx.h16494 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7s7xx.h21577 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32h7s3xx.h21145 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32h7r3xx.h20262 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro
Dstm32h7r7xx.h20692 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000… macro

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