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Searched defs:LPI2C_MCFGR3_PINLOW_MASK (Results 1 – 25 of 60) sorted by relevance

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/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPI2C.h420 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h3934 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h3935 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h6810 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h3933 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h6812 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h6814 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h6494 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h6496 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h9989 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h8990 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h9994 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h7817 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h7817 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h9569 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
DK32L3A60_cm4.h10204 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h18814 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h12409 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h12408 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h21852 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h26007 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h25990 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h28540 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h27046 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h29753 #define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U) macro

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