| /trusted-firmware-m-latest/platform/ext/target/rpi/rp2350/ |
| D | tfm_hal_platform.c | 70 NVIC_SetVector(MemoryManagement_IRQn, (uint32_t) MemManage_Handler); in tfm_hal_platform_init()
71 NVIC_SetVector(BusFault_IRQn, (uint32_t) BusFault_Handler); in tfm_hal_platform_init()
72 NVIC_SetVector(UsageFault_IRQn, (uint32_t) UsageFault_Handler); in tfm_hal_platform_init()
73 NVIC_SetVector(SecureFault_IRQn, (uint32_t) SecureFault_Handler); in tfm_hal_platform_init()
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| D | tfm_hal_multi_core.c | 95 NVIC_SetVector(SIO_IRQ_BELL_IRQn, (uint32_t) Core1Doorbell_Handler); in core1_entry()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps2/an521/cmsis_core/ |
| D | an521_ns_init.c | 17 NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler); in tfm_ns_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/device/source/ |
| D | corstone315_ns_init.c | 17 NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler); in tfm_ns_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/device/source/ |
| D | corstone310_ns_init.c | 17 NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler); in tfm_ns_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/device/source/ |
| D | alcor_ns_init.c | 18 NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler); in tfm_ns_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/device/source/ |
| D | corstone300_ns_init.c | 17 NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler); in tfm_ns_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/rdfremont/bl2/ |
| D | interrupts_bl2.c | 84 NVIC_SetVector(CMU_MHU4_Receiver_IRQn, CMU_MHU4_Receiver_Handler); in interrupts_bl2_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/ |
| D | tfm_hal_platform.c | 70 NVIC_SetVector(TFM_FPU_S_TEST_IRQ, (uint32_t)TFM_FPU_S_TEST_Handler); in tfm_hal_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/ |
| D | tfm_hal_platform.c | 70 NVIC_SetVector(TFM_FPU_S_TEST_IRQ, (uint32_t)TFM_FPU_S_TEST_Handler); in tfm_hal_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/ |
| D | tfm_hal_platform.c | 74 NVIC_SetVector(TFM_FPU_S_TEST_IRQ, (uint32_t)TFM_FPU_S_TEST_Handler); in tfm_hal_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/ |
| D | tfm_hal_platform.c | 74 NVIC_SetVector(TFM_FPU_S_TEST_IRQ, (uint32_t)TFM_FPU_S_TEST_Handler); in tfm_hal_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/rpi/rp2350/ns/ |
| D | platform_ns_mailbox.c | 63 NVIC_SetVector(SIO_IRQ_FIFO_NS_IRQn, (uint32_t) SIO_IRQ_FIFO_NS_IRQHandler); in tfm_ns_mailbox_hal_init()
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| /trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/ |
| D | core_cm0.h | 605 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm1.h | 632 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_sc000.h | 740 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm0plus.h | 723 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm3.h | 1458 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_sc300.h | 1441 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm23.h | 1327 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm4.h | 1637 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm7.h | 1856 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm33.h | 2156 #define NVIC_SetVector __NVIC_SetVector macro
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| D | core_cm35p.h | 2156 #define NVIC_SetVector __NVIC_SetVector macro
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| /trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/CoreValidation/Source/ |
| D | CV_CoreFunc.c | 226 NVIC_SetVector(Interrupt0_IRQn, wdtvec + 32U); in TC_CoreFunc_IRQVect()
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