| /trusted-firmware-m-latest/platform/ext/target/arm/rse/common/ |
| D | tfm_peripherals_def.h | 68 ARM_MPU_RBAR(ITCM_BASE_S, \ 73 ARM_MPU_RLAR_PXN(ITCM_BASE_S + ITCM_SIZE - 1, \
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/partition/ |
| D | region_defs.h | 130 #define BL2_CODE_START (ITCM_BASE_S)
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/partition/ |
| D | region_defs.h | 138 #define BL2_CODE_START (ITCM_BASE_S)
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/common/bl1/ |
| D | boot_hal_bl1_1.c | 116 {ITCM_BASE_S, ITCM_SIZE, ITCM_CPU0_BASE_S, 0x01000000}, in boot_platform_init()
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/common/partition/ |
| D | platform_base_address.h | 83 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| D | region_defs.h | 200 #define BL1_2_CODE_START (ITCM_BASE_S)
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/device/source/ |
| D | platform_s_device_definition.c | 413 .base = ITCM_BASE_S, 414 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an547/partition/ |
| D | platform_base_address.h | 101 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/an557/partition/ |
| D | platform_base_address.h | 95 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/device/source/ |
| D | platform_s_device_definition.c | 422 .base = ITCM_BASE_S, 423 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/device/source/ |
| D | platform_s_device_definition.c | 424 .base = ITCM_BASE_S, 425 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/device/source/ |
| D | platform_s_device_definition.c | 412 .base = ITCM_BASE_S, 413 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/partition/ |
| D | platform_base_address.h | 118 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an552/partition/ |
| D | platform_base_address.h | 106 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/fvp/partition/ |
| D | platform_base_address.h | 116 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/partition/ |
| D | platform_base_address.h | 111 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
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| /trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/ |
| D | target_cfg.c | 621 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg() 622 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/ |
| D | target_cfg.c | 634 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg() 635 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/ |
| D | target_cfg.c | 650 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg() 651 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
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| /trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/ |
| D | target_cfg.c | 642 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg() 643 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
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| /trusted-firmware-m-latest/platform/ext/target/arm/rse/common/device/source/ |
| D | device_definition.c | 616 {ITCM_BASE_S, ITCM_SIZE, ITCM_CPU0_BASE_S, 0x01000000},
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