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Searched refs:ITCM_BASE_S (Results 1 – 21 of 21) sorted by relevance

/trusted-firmware-m-latest/platform/ext/target/arm/rse/common/
Dtfm_peripherals_def.h68 ARM_MPU_RBAR(ITCM_BASE_S, \
73 ARM_MPU_RLAR_PXN(ITCM_BASE_S + ITCM_SIZE - 1, \
/trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/partition/
Dregion_defs.h130 #define BL2_CODE_START (ITCM_BASE_S)
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/partition/
Dregion_defs.h138 #define BL2_CODE_START (ITCM_BASE_S)
/trusted-firmware-m-latest/platform/ext/target/arm/rse/common/bl1/
Dboot_hal_bl1_1.c116 {ITCM_BASE_S, ITCM_SIZE, ITCM_CPU0_BASE_S, 0x01000000}, in boot_platform_init()
/trusted-firmware-m-latest/platform/ext/target/arm/rse/common/partition/
Dplatform_base_address.h83 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
Dregion_defs.h200 #define BL1_2_CODE_START (ITCM_BASE_S)
/trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/device/source/
Dplatform_s_device_definition.c413 .base = ITCM_BASE_S,
414 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an547/partition/
Dplatform_base_address.h101 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/an557/partition/
Dplatform_base_address.h95 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/device/source/
Dplatform_s_device_definition.c422 .base = ITCM_BASE_S,
423 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/device/source/
Dplatform_s_device_definition.c424 .base = ITCM_BASE_S,
425 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/device/source/
Dplatform_s_device_definition.c412 .base = ITCM_BASE_S,
413 .limit = ITCM_BASE_S + ITCM_SIZE - 1,
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/partition/
Dplatform_base_address.h118 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/an552/partition/
Dplatform_base_address.h106 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/fvp/partition/
Dplatform_base_address.h116 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/partition/
Dplatform_base_address.h111 #define ITCM_BASE_S 0x10000000 /* Instruction TCM Secure base address */ macro
/trusted-firmware-m-latest/platform/ext/target/armchina/mps3/alcor/common/
Dtarget_cfg.c621 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg()
622 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone300/common/
Dtarget_cfg.c634 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg()
635 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
/trusted-firmware-m-latest/platform/ext/target/arm/mps4/corstone315/
Dtarget_cfg.c650 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg()
651 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
/trusted-firmware-m-latest/platform/ext/target/arm/mps3/corstone310/common/
Dtarget_cfg.c642 Driver_ITCM_TGU_ARMV8_M.ConfigRegion(ITCM_BASE_S, in mpc_revert_non_secure_to_secure_cfg()
643 (ITCM_BASE_S + ITCM_SIZE - 1), in mpc_revert_non_secure_to_secure_cfg()
/trusted-firmware-m-latest/platform/ext/target/arm/rse/common/device/source/
Ddevice_definition.c616 {ITCM_BASE_S, ITCM_SIZE, ITCM_CPU0_BASE_S, 0x01000000},