Searched refs:unprivileged (Results 1 – 18 of 18) sorted by relevance
/trusted-firmware-m-3.7.0/platform/ext/target/arm/drivers/dma/dma350/ |
D | dma350_lib.c | 124 bool unprivileged; member 155 memattr->unprivileged = true; in dma350_get_memattr() 157 memattr->unprivileged = false; in dma350_get_memattr() 170 memattr->unprivileged = true; in dma350_get_memattr() 172 memattr->unprivileged = false; in dma350_get_memattr() 190 memattr->unprivileged = true; in dma350_get_memattr() 192 memattr->unprivileged = false; in dma350_get_memattr() 221 memattr->unprivileged = false; in dma350_get_memattr() 255 if(memattr.unprivileged) { in dma350_lib_set_src() 288 if(memattr.unprivileged) { in dma350_lib_set_des()
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/trusted-firmware-m-3.7.0/platform/ext/common/armclang/ |
D | tfm_common_s.sct | 67 * of TFM unprivileged code. 159 * regions, unprivileged data sections and privileged data sections are 160 * separated and gathered in unprivileged/privileged data area respectively.
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D | tfm_isolation_l3.sct.template | 134 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/docs/platform/arm/mps3/corstone300/ |
D | README.rst | 17 interrupt number and an example NPU setup as non-secure, unprivileged. 36 interrupt number and an example NPU setup as non-secure, unprivileged. 45 interrupt number and an example NPU setup as non-secure, unprivileged. 54 interrupt number and an example NPU setup as non-secure, unprivileged.
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/trusted-firmware-m-3.7.0/docs/platform/arm/mps3/corstone310/ |
D | README.rst | 18 interrupt number and an example NPU setup as non-secure, unprivileged. 37 interrupt number and an example NPU setup as non-secure, unprivileged. 47 interrupt number and an example NPU setup as non-secure, unprivileged.
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/trusted-firmware-m-3.7.0/docs/design_docs/dual-cpu/ |
D | tfm_multi_core_access_check.rst | 156 classified as unprivileged in current TF-M implementation. Multi-core access 157 check may skip the privileged/unprivileged permission check for non-secure 160 If a multi-core system enforces the privileged/unprivileged isolation and 194 Mapped to CMSE macro ``CMSE_MPU_UNPRIV`` to indicate that it is an unprivileged 277 memory region allows unprivileged read/write. Both the fields are valid only
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/trusted-firmware-m-3.7.0/platform/ext/common/iar/ |
D | tfm_common_s.icf | 61 * of TFM unprivileged code. 317 * regions, unprivileged data sections and privileged data sections are 318 * separated and gathered in unprivileged/privileged data area respectively.
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D | tfm_isolation_l3.icf.template | 122 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/platform/ext/common/gcc/ |
D | tfm_common_s.ld | 301 * regions, unprivileged data sections and privileged data sections are 302 * separated and gathered in unprivileged/privileged data area respectively.
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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/Device/Source/armclang/ |
D | tfm_common_s.sct | 69 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Source/armclang/ |
D | tfm_common_s.sct | 70 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/docs/platform/arm/mps4/corstone315/ |
D | README.rst | 17 interrupt number and an example NPU setup as non-secure, unprivileged.
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/trusted-firmware-m-3.7.0/platform/ext/target/nuvoton/m2351/device/source/armclang/ |
D | m2351_s.sct | 39 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/platform/ext/target/nuvoton/m2354/device/source/armclang/ |
D | m2354_s.sct | 39 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32u5xx/Device/Source/iar/ |
D | tfm_common_s.icf | 44 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/platform/ext/target/stm/common/stm32h5xx/Device/Source/iar/ |
D | tfm_common_s.icf | 45 * of TFM unprivileged code.
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/trusted-firmware-m-3.7.0/docs/design_docs/software/ |
D | hardware_abstraction_layer.rst | 349 ``TFM_HAL_ACCESS_UNPRIVILEGED | TFM_HAL_ACCESS_READABLE`` is unprivileged 378 The memory is unprivileged mode accessible.
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/trusted-firmware-m-3.7.0/docs/design_docs/ |
D | tfm_physical_attack_mitigation.rst | 560 - MPU: Protects memory from unprivileged access. ARoT code has only a
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