Searched refs:NVIC (Results 1 – 25 of 488) sorted by relevance
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| /Zephyr-latest/soc/nordic/nrf54h/ |
| D | pm_s2ram.c | 98 memcpy(backup->ISER, (uint32_t *)NVIC->ISER, sizeof(NVIC->ISER)); in nvic_suspend()
99 memcpy(backup->ISPR, (uint32_t *)NVIC->ISPR, sizeof(NVIC->ISPR)); in nvic_suspend()
100 memcpy(backup->IPR, (uint32_t *)NVIC->IPR, sizeof(NVIC->IPR)); in nvic_suspend()
105 memcpy((uint32_t *)NVIC->ISER, backup->ISER, sizeof(NVIC->ISER)); in nvic_resume()
106 memcpy((uint32_t *)NVIC->ISPR, backup->ISPR, sizeof(NVIC->ISPR)); in nvic_resume()
107 memcpy((uint32_t *)NVIC->IPR, backup->IPR, sizeof(NVIC->IPR)); in nvic_resume()
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | irq_manage.c | 49 return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq)); in arch_irq_is_enabled()
226 for (i = 0; i < sizeof(NVIC->ICER) / sizeof(NVIC->ICER[0]); i++) { in irq_target_state_set_all_non_secure()
227 NVIC->ICER[i] = 0xFFFFFFFF; in irq_target_state_set_all_non_secure()
234 for (i = 0; i < sizeof(NVIC->ITNS) / sizeof(NVIC->ITNS[0]); i++) { in irq_target_state_set_all_non_secure()
235 NVIC->ITNS[i] = 0xFFFFFFFF; in irq_target_state_set_all_non_secure()
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| D | scb.c | 108 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) { in z_arm_init_arch_hw_at_boot()
109 NVIC->ICER[i] = 0xFFFFFFFF; in z_arm_init_arch_hw_at_boot()
112 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) { in z_arm_init_arch_hw_at_boot()
113 NVIC->ICPR[i] = 0xFFFFFFFF; in z_arm_init_arch_hw_at_boot()
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| /Zephyr-latest/soc/microchip/mec/mec15xx/ |
| D | soc.c | 43 NVIC->ICER[n] = 0xFFFFFFFFul; in soc_ecia_init()
44 NVIC->ICPR[n] = 0xFFFFFFFFul; in soc_ecia_init()
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| D | Kconfig.defconfig.series | 11 # All NVIC external sources.
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| /Zephyr-latest/soc/microchip/mec/mec174x/ |
| D | Kconfig.defconfig.series | 11 # All NVIC external sources.
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| /Zephyr-latest/soc/microchip/mec/mec175x/ |
| D | Kconfig.defconfig.series | 11 # All NVIC external sources.
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| /Zephyr-latest/soc/microchip/mec/mech172x/ |
| D | Kconfig.defconfig.series | 11 # All NVIC external sources.
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| /Zephyr-latest/soc/microchip/mec/mec172x/ |
| D | Kconfig.defconfig.series | 11 # All NVIC external sources.
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| /Zephyr-latest/tests/arch/arm/arm_thread_swap/src/ |
| D | arm_syscalls.c | 141 NVIC->STIR = irq_line; in user_thread_entry()
149 NVIC->STIR = irq_line; in user_thread_entry()
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| /Zephyr-latest/boards/vngiotlab/nrf52_vbluno52/doc/ |
| D | index.rst | 11 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
34 | NVIC | on-chip | nested vectored |
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| /Zephyr-latest/boards/nordic/nrf54l20pdk/doc/ |
| D | index.rst | 22 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
53 | NVIC | on-chip | arch/arm |
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| /Zephyr-latest/boards/bbc/microbit/doc/ |
| D | index.rst | 16 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
48 | NVIC | on-chip | nested vectored |
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| /Zephyr-latest/boards/we/ophelia1ev/doc/ |
| D | index.rst | 14 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
49 | NVIC | on-chip | arch/arm |
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| /Zephyr-latest/boards/brcm/bcm958401m2/doc/ |
| D | index.rst | 27 | NVIC | on-chip | nested vectored interrupt controller |
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| /Zephyr-latest/boards/croxel/croxel_cx1825/doc/ |
| D | index.rst | 15 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
54 - SOC peripherals (ADC, Clock, Flash, GPIO, I2C, MPU, NVIC, PWM, Radio, RTC, SPI, USB, WDT)
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| /Zephyr-latest/boards/norik/octopus_som/doc/ |
| D | index.rst | 20 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
53 | NVIC | on-chip | arch/arm |
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| /Zephyr-latest/boards/brcm/bcm958402m2/doc/ |
| D | m7.rst | 27 | NVIC | on-chip | nested vectored interrupt controller |
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| /Zephyr-latest/subsys/testsuite/include/zephyr/ |
| D | interrupt_util.h | 69 NVIC->STIR = irq; in trigger_irq()
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| /Zephyr-latest/tests/arch/arm/arm_custom_interrupt/src/ |
| D | arm_custom_interrupt.c | 57 return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq)); in z_soc_irq_is_enabled()
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| /Zephyr-latest/boards/bcdevices/plt_demo_v2/doc/ |
| D | index.rst | 18 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
62 | NVIC | on-chip | arch/arm |
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| /Zephyr-latest/arch/arm/ |
| D | Kconfig | 21 non-GIC or NVIC) interrupt controller.
27 the Cortex-M ARM Nested Vectored Interrupt Controller (NVIC).
33 N.B. Since all Cortex-M cores have a NVIC, if this option is selected it
35 assumes responsibility for handling the NVIC.
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| /Zephyr-latest/boards/waveshare/open103z/doc/ |
| D | index.rst | 24 | NVIC | on-chip | nested vectored interrupt controller |
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| /Zephyr-latest/boards/holyiot/yj16019/doc/ |
| D | index.rst | 13 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
47 | NVIC | on-chip | arch/arm |
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| /Zephyr-latest/boards/nordic/nrf51dongle/doc/ |
| D | index.rst | 17 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
62 | NVIC | on-chip | arch/arm |
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