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/trusted-firmware-m-3.4.0/platform/ext/target/stm/common/scripts/
DTFM_BIN2HEX.sh43 python scripts/bin2hex.py --offset=$image_s $BINPATH/tfm_s_signed.bin $BINPATH/tfm_s_signed.hex
44 python scripts/bin2hex.py --offset=$image_ns $BINPATH/tfm_ns_signed.bin $BINPATH/tfm_ns_signed.hex
45 python scripts/bin2hex.py --offset=$bl2 $BINPATH/bl2.bin $BINPATH/bl2.hex
55 python scripts/bin2hex.py --offset=0x8000000 $BINPATH/clean.bin $BINPATH/clean.hex
56 cp $BINPATH/clean.hex $disk_option
57 while [ -f $disk_option/clean.hex ];
73 cp $BINPATH/tfm_s_signed.hex $disk_option
74 while [ -f $disk_option/tfm_s_signed.hex ];
90 cp $BINPATH/tfm_ns_signed.hex $disk_option
91 while [ -f $disk_option/tfm_ns_signed.hex ];
[all …]
Dstm_tool.py44 line = begin_line+"="+hex(value)+"\n"
/trusted-firmware-m-3.4.0/docs/platform/lairdconnectivity/bl5340_dvk_cpuapp/
DREADME.rst100 Generate Intel hex files from the output binary (bin) files as follows:
104 … --offset=0x10000 -o install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/tfm_s_ns_signed.hex -intel
117 …nrfjprog --program <sample folder>/install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/bl2.hex -f …
118 …older>/install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/tfm_s_ns_signed.hex -f nrf53 --sectorer…
133 Generate Intel hex files from the output binary (bin) files as follows:
137 …t=0x10000000 -o install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/tfm_s_ns_signed_qspi.hex -intel
150 …nrfjprog --program <sample folder>/install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/bl2.hex -f …
151 …older>/install/outputs/LAIRDCONNECTIVITY/BL5340_DVK_CPUAPP/tfm_s_ns_signed.hex -f nrf53 --qspisect…
/trusted-firmware-m-3.4.0/docs/platform/cypress/psoc64/
Dcypress_psoc64_spec.rst243 unsigned copy <filename>_unsigned.hex.
253 --hex <build folder>/bin/tfm_s.hex \
265 --hex <build folder>/bin/tfm_ns.hex \
270 also it creates an unsigned copy _unsigned.hex.
272 * image-type option: "--image-type BOOT" creates a signed hex file with offsets
298 Copy tfm hex files one by one to the DAPLINK device:
302 cp <build folder>/bin/tfm_ns.hex <mount point>/DAPLINK/; sync
303 cp <build folder>/bin/tfm_s.hex <mount point>/DAPLINK/; sync
345 -c "flash write_image erase ${BUILD_DIR}/bin/tfm_s.hex" \
353 -c "flash write_image erase ${BUILD_DIR}/bin/tfm_ns.hex" \
[all …]
/trusted-firmware-m-3.4.0/secure_fw/partitions/crypto/
DKconfig12 hex "Heap size for the crypto backend"
80 hex "Stack size"
/trusted-firmware-m-3.4.0/docs/platform/nordic_nrf/nrf9160dk_nrf9160/
DREADME.rst86 Generate Intel hex files from the output binary (bin) files as follows:
90 …-binary --offset=0x10000 -o install/outputs/NORDIC_NRF/NRF9160DK_NRF9160/tfm_s_ns_signed.hex -intel
103 …nrfjprog --program <sample folder>/install/outputs/NORDIC_NRF/NRF9160DK_NRF9160/bl2.hex -f nrf91 -…
104 …ample folder>/install/outputs/NORDIC_NRF/NRF9160DK_NRF9160/tfm_s_ns_signed.hex -f nrf91 --sectorer…
/trusted-firmware-m-3.4.0/secure_fw/partitions/platform/
DKconfig20 hex "Stack size"
/trusted-firmware-m-3.4.0/docs/platform/nordic_nrf/nrf5340dk_nrf5340_cpuapp/
DREADME.rst93 Generate Intel hex files from the output binary (bin) files as follows:
97 … --offset=0x10000 -o install/outputs/NORDIC_NRF/NRF5340DK_NRF5340_CPUAPP/tfm_s_ns_signed.hex -intel
110 …nrfjprog --program <sample folder>/install/outputs/NORDIC_NRF/NRF5340DK_NRF5340_CPUAPP/bl2.hex -f …
111 …older>/install/outputs/NORDIC_NRF/NRF5340DK_NRF5340_CPUAPP/tfm_s_ns_signed.hex -f nrf53 --sectorer…
/trusted-firmware-m-3.4.0/secure_fw/partitions/firmware_update/
DKconfig25 hex "Stack size"
/trusted-firmware-m-3.4.0/
Dtoolchain_IARARM.cmake170 SOURCES ${bin_dir}/${target}.hex
172 add_custom_command(OUTPUT ${bin_dir}/${target}.hex
177 ${bin_dir}/${target}.hex
/trusted-firmware-m-3.4.0/docs/platform/nxp/lpcxpresso55s69/
DREADME.rst154 When BL2 is disabled, flash the generated hex secure and non-secure images:
157 J-Link> loadfile ${BUILD_DIR}/bl2.hex
164 J-Link> loadfile ${BUILD_DIR}/tfm_s.hex
165 J-Link> loadfile ${BUILD_DIR}/tfm_ns.hex
196 $ pyocd flash ${BUILD_DIR}/tfm_s.hex -t LPC55S69
197 $ pyocd flash ${BUILD_DIR}/tfm_ns.hex -t LPC55S69
199 When BL2 is disabled, flash the generated hex secure and non-secure images:
203 $ pyocd flash ${BUILD_DIR}/bl2.hex -t LPC55S69
/trusted-firmware-m-3.4.0/secure_fw/partitions/initial_attestation/
DKconfig36 hex "Stack size"
/trusted-firmware-m-3.4.0/lib/ext/cryptocell-312-runtime/utils/src/cc3x_boot_cert/examples/enabler_cert/
Dsb_enabler_dbg_cert_rma.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dx509_sb_enabler_dbg_cert_rma.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert_rma_no_pwd.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dx509_sb_enabler_dbg_cert.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
Dsb_enabler_dbg_cert_no_pwd.cfg16 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
18 #debug-mask[x-y] = The additional DCU lock by the OEM. 128 bit mask in 4*32 bits hex format (…
/trusted-firmware-m-3.4.0/lib/ext/cryptocell-312-runtime/utils/src/cc3x_asset_prov_rt/examples/
Dasset_prov_se_512.cfg13 #asset-id = The ICV asset ID in 32 bits hex format (e.g. 0x7000000f).
/trusted-firmware-m-3.4.0/secure_fw/partitions/protected_storage/
DKconfig50 hex "Stack size"
/trusted-firmware-m-3.4.0/secure_fw/partitions/internal_trusted_storage/
DKconfig53 hex "Stack size"
/trusted-firmware-m-3.4.0/lib/ext/cryptocell-312-runtime/utils/src/cc3x_boot_cert/examples/developer_cert/
Dsb_developer_dbg_cert.cfg14 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
Dsb_developer_dbg_cert_no_pwd.cfg14 #debug-mask[x-y] = The DCU mask allowed by the OEM. 128 bit mask in 4*32 bits hex format (e.g.…
/trusted-firmware-m-3.4.0/docs/building/
Drun_tfm_examples_on_arm_platforms.rst235 #. Create a unified hex file comprising of both ``bl2.bin`` and
242 …2.bin -Binary -offset 0xA000000 bin\tfm_s_ns_signed.bin -Binary -offset 0xA020000 -o tfm.hex -Intel
246 …2.bin -Binary -offset 0xA000000 bin/tfm_s_ns_signed.bin -Binary -offset 0xA020000 -o tfm.hex -Intel
252 …2.bin -Binary -offset 0xA000000 bin\tfm_s_ns_signed.bin -Binary -offset 0xA020000 -o tfm.hex -Intel
256 …2.bin -Binary -offset 0xA000000 bin/tfm_s_ns_signed.bin -Binary -offset 0xA020000 -o tfm.hex -Intel
261 #. Copy ``tfm.hex`` to the USB drive. The orange ``PWR`` LED should start
290 combined hex file. The ``<start_addr>`` and ``<end_addr>`` are the start and
406 Follow the above procedures, but create a unified hex file out of ``tfm_s.bin``
411 … bin\tfm_s.bin -Binary -offset 0xA000000 bin\tfm_ns.bin -Binary -offset 0xA080000 -o tfm.hex -Intel
415 … bin/tfm_s.bin -Binary -offset 0xA000000 bin/tfm_ns.bin -Binary -offset 0xA080000 -o tfm.hex -Intel
/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/m2354/bsp/Library/StdDriver/src/
Dcrypto.c876 char hex; in Hex2Reg() local
888 hex = ch2hex(input[si]); in Hex2Reg()
889 val32 |= (uint32_t)hex << (i * 4UL); in Hex2Reg()
898 uint32_t hex, carry; in Hex2RegEx() local
910 hex = (uint32_t)ch2hex(input[si]); in Hex2RegEx()
911 hex <<= shift; in Hex2RegEx()
913 val32 |= (uint32_t)((hex & 0xFU) | carry) << (i * 4UL); in Hex2RegEx()
914 carry = (hex >> 4) & 0xFU; in Hex2RegEx()

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