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Searched refs:dma_sec_ctrl (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/native_drivers/
Ddma350_drv.c142 dev->cfg->dma_sec_ctrl->SEC_CHPTR = channel; in dma350_set_ch_privileged()
143 dev->cfg->dma_sec_ctrl->SEC_CHCFG = in dma350_set_ch_privileged()
144 dev->cfg->dma_sec_ctrl->SEC_CHCFG | DMA_SEC_CHCFG_CHPRIV_Msk; in dma350_set_ch_privileged()
145 if (dev->cfg->dma_sec_ctrl->SEC_CHCFG & (DMA_SEC_CHCFG_CHPRIV_Msk)) { in dma350_set_ch_privileged()
171 dev->cfg->dma_sec_ctrl->SEC_CHPTR = channel; in dma350_set_ch_unprivileged()
172 dev->cfg->dma_sec_ctrl->SEC_CHCFG = in dma350_set_ch_unprivileged()
173 dev->cfg->dma_sec_ctrl->SEC_CHCFG & ~(DMA_SEC_CHCFG_CHPRIV_Msk); in dma350_set_ch_unprivileged()
174 if (dev->cfg->dma_sec_ctrl->SEC_CHCFG & (DMA_SEC_CHCFG_CHPRIV_Msk)) { in dma350_set_ch_unprivileged()
Ddma350_drv.h98 DMASECCTRL_TypeDef *dma_sec_ctrl; /*!< DMA350 secure control */ member
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/fvp/native_drivers/
Ddma350_drv.c142 dev->cfg->dma_sec_ctrl->SEC_CHPTR = channel; in dma350_set_ch_privileged()
143 dev->cfg->dma_sec_ctrl->SEC_CHCFG = in dma350_set_ch_privileged()
144 dev->cfg->dma_sec_ctrl->SEC_CHCFG | DMA_SEC_CHCFG_CHPRIV_Msk; in dma350_set_ch_privileged()
145 if (dev->cfg->dma_sec_ctrl->SEC_CHCFG & (DMA_SEC_CHCFG_CHPRIV_Msk)) { in dma350_set_ch_privileged()
171 dev->cfg->dma_sec_ctrl->SEC_CHPTR = channel; in dma350_set_ch_unprivileged()
172 dev->cfg->dma_sec_ctrl->SEC_CHCFG = in dma350_set_ch_unprivileged()
173 dev->cfg->dma_sec_ctrl->SEC_CHCFG & ~(DMA_SEC_CHCFG_CHPRIV_Msk); in dma350_set_ch_unprivileged()
174 if (dev->cfg->dma_sec_ctrl->SEC_CHCFG & (DMA_SEC_CHCFG_CHPRIV_Msk)) { in dma350_set_ch_unprivileged()
Ddma350_drv.h98 DMASECCTRL_TypeDef *dma_sec_ctrl; /*!< DMA350 secure control */ member
/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/device/source/
Ddevice_definition.c512 .dma_sec_ctrl = (DMASECCTRL_TypeDef*) (DMA_350_BASE_S + 0x100UL),
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/common/device/source/
Dplatform_s_device_definition.c397 .dma_sec_ctrl = (DMASECCTRL_TypeDef*) (DMA_350_BASE_S + 0x100UL),
/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/
Dtarget_cfg.c531 DMA350_DMA0_DEV_S.cfg->dma_sec_ctrl->SEC_CTRL |= 0x1UL; /* INTREN_ANYCHINTR */ in dma_init_cfg()