/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an547/ |
D | tfm_interrupts.c | 33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 34 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 35 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 25 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an552/ |
D | tfm_interrupts.c | 35 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 36 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 37 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 25 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/ |
D | tfm_interrupts.c | 33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 34 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 35 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/ |
D | tfm_interrupts.c | 33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 34 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 35 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps2/an519/ |
D | tfm_interrupts.c | 34 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 35 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 36 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an524/ |
D | tfm_interrupts.c | 33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 34 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 35 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps2/an521/ |
D | tfm_interrupts.c | 33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 34 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 35 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/common/ |
D | tfm_interrupts.c | 45 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 46 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 47 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 25 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/ |
D | tfm_interrupts.c | 35 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 36 NVIC_ClearTargetState(TFM_TIMER0_IRQ); in tfm_timer0_irq_init() 37 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 25 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/cypress/psoc64/ |
D | tfm_interrupts.c | 36 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init() 37 NVIC_DisableIRQ(TFM_TIMER0_IRQ); in tfm_timer0_irq_init()
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D | tfm_peripherals_def.h | 24 #define TFM_TIMER0_IRQ (NvicMux3_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/nuvoton/common/ |
D | tfm_peripherals_def.h | 18 #define TFM_TIMER0_IRQ (TMR0_IRQn) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/nxp/lpcxpresso55s69/ |
D | tfm_peripherals_def.h | 19 #define TFM_TIMER0_IRQ CTIMER2_IRQn /* (tfm_core_irq_signal_data_t->irq_lin… macro
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/trusted-firmware-m-3.4.0/platform/ext/target/cypress/psoc64/Device/Source/ |
D | device_definition.c | 101 .intrSrc = TFM_TIMER0_IRQ, /* NVIC #3 */
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/trusted-firmware-m-3.4.0/platform/ext/target/nordic_nrf/common/nrf91/ |
D | tfm_peripherals_def.h | 48 #define TFM_TIMER0_IRQ (NRFX_IRQ_NUMBER_GET(NRF_TIMER0)) macro
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/trusted-firmware-m-3.4.0/platform/ext/target/lairdconnectivity/common/bl5340/ |
D | tfm_peripherals_def.h | 51 #define TFM_TIMER0_IRQ (TIMER0_IRQn) macro
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