Searched refs:DMA_350_BASE_S (Results 1 – 6 of 6) sorted by relevance
| /trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/fvp/ |
| D | dma_init.c | 24 DMA_350_BASE_S + 0x1000,
25 DMA_350_BASE_S + 0x10FF,
31 DMA_350_BASE_S + 0x1100,
32 DMA_350_BASE_S + 0x11FF,
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| /trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/ |
| D | tfm_peripherals_def.c | 26 DMA_350_BASE_S + 0x1000UL, /* The DMA0 CH0 starts at 0x1000 offset */
27 DMA_350_BASE_S + 0x1FFFUL, /* and its size is 0x1000. */
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| /trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/device/source/ |
| D | device_definition.c | 511 .dma_sec_cfg = (DMASECCFG_TypeDef*) (DMA_350_BASE_S + 0x0UL),
512 .dma_sec_ctrl = (DMASECCTRL_TypeDef*) (DMA_350_BASE_S + 0x100UL),
513 .dma_nsec_ctrl = (DMANSECCTRL_TypeDef*) (DMA_350_BASE_S + 0x200UL),
514 .dma_info = (DMAINFO_TypeDef*) (DMA_350_BASE_S + 0xF00UL)
527 .cfg = {.ch_base = (DMACH_TypeDef*) (DMA_350_BASE_S + 0x1000UL),
535 .cfg = {.ch_base = (DMACH_TypeDef*) (DMA_350_BASE_S + 0x1100UL),
543 .cfg = {.ch_base = (DMACH_TypeDef*) (DMA_350_BASE_S + 0x1200UL),
551 .cfg = {.ch_base = (DMACH_TypeDef*) (DMA_350_BASE_S + 0x1300UL),
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| /trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/common/device/source/ |
| D | platform_s_device_definition.c | 396 .dma_sec_cfg = (DMASECCFG_TypeDef*) (DMA_350_BASE_S + 0x0UL),
397 .dma_sec_ctrl = (DMASECCTRL_TypeDef*) (DMA_350_BASE_S + 0x100UL),
398 .dma_nsec_ctrl = (DMANSECCTRL_TypeDef*) (DMA_350_BASE_S + 0x200UL),
399 .dma_info = (DMAINFO_TypeDef*) (DMA_350_BASE_S + 0xF00UL)
411 .cfg = {.ch_base = (DMACH_TypeDef *)(DMA_350_BASE_S + 0x1000UL),
416 .cfg = {.ch_base = (DMACH_TypeDef *)(DMA_350_BASE_S + 0x1100UL),
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| /trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/partition/ |
| D | platform_base_address.h | 82 #define DMA_350_BASE_S 0x50002000 /* DMA350 Secure base address */ macro
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| /trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/common/partition/ |
| D | platform_base_address.h | 111 #define DMA_350_BASE_S 0x50002000 /* DMA350 register block Secure base address */ macro
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