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Searched refs:DEFAULT_IRQ_PRIORITY (Results 1 – 24 of 24) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/corstone310/common/
Dtfm_interrupts.c45 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
58 NVIC_SetPriority(TFM_DMA0_CH0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_dma0_ch0_irq_init()
71 NVIC_SetPriority(TFM_DMA0_CH1_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_dma0_ch1_irq_init()
Dtfm_peripherals_def.h23 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/cypress/psoc64/
Dtfm_interrupts.c36 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
78 NVIC_SetPriority(NvicMux7_IRQn, DEFAULT_IRQ_PRIORITY); in mailbox_irq_init()
98 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/
Dtfm_interrupts.c33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
55 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_b1/
Dtfm_interrupts.c33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
55 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps2/an519/
Dtfm_interrupts.c34 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
56 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an524/
Dtfm_interrupts.c33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
55 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps2/an521/
Dtfm_interrupts.c33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
55 NVIC_SetPriority(FF_TEST_UART_IRQ, DEFAULT_IRQ_PRIORITY); in ff_test_uart_irq_init()
Dtfm_peripherals_def.h22 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/rss/common/
Dtfm_interrupts.c35 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
89 NVIC_SetPriority(TFM_DMA0_COMBINED_S_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_dma0_combined_s_irq_init()
Dtfm_peripherals_def.h23 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an547/
Dtfm_interrupts.c33 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
Dtfm_peripherals_def.h23 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/arm/mps3/an552/
Dtfm_interrupts.c35 NVIC_SetPriority(TFM_TIMER0_IRQ, DEFAULT_IRQ_PRIORITY); in tfm_timer0_irq_init()
Dtfm_peripherals_def.h23 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
/trusted-firmware-m-3.4.0/platform/ext/target/nordic_nrf/common/nrf91/
Dtfm_peripherals_def.h191 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
Dtfm_interrupts.c28 NVIC_SetPriority(irqn, DEFAULT_IRQ_PRIORITY); in irq_init()
/trusted-firmware-m-3.4.0/platform/ext/target/nordic_nrf/common/nrf5340/
Dtfm_peripherals_def.h232 #define DEFAULT_IRQ_PRIORITY (1UL << (__NVIC_PRIO_BITS - 2)) macro
Dtfm_interrupts.c28 NVIC_SetPriority(irqn, DEFAULT_IRQ_PRIORITY); in irq_init()