Searched refs:rcc_base (Results 1 – 5 of 5) sorted by relevance
33 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp_reset_assert() local35 mmio_write_32(rcc_base + offset, bitmsk); in stm32mp_reset_assert()40 while ((mmio_read_32(rcc_base + offset) & bitmsk) == 0U) { in stm32mp_reset_assert()54 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp_reset_deassert() local56 mmio_write_32(rcc_base + offset, bitmsk); in stm32mp_reset_deassert()61 while ((mmio_read_32(rcc_base + offset) & bitmsk) != 0U) { in stm32mp_reset_deassert()
679 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp1_rcc_is_secure() local682 return (mmio_read_32(rcc_base + RCC_TZCR) & mask) == mask; in stm32mp1_rcc_is_secure()687 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp1_rcc_is_mckprot() local690 return (mmio_read_32(rcc_base + RCC_TZCR) & mask) == mask; in stm32mp1_rcc_is_mckprot()744 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp1_clk_get_parent() local771 p_sel = (mmio_read_32(rcc_base + sel->offset) & in stm32mp1_clk_get_parent()798 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp1_pll_get_fvco() local800 cfgr1 = mmio_read_32(rcc_base + pll->pllxcfgr1); in stm32mp1_pll_get_fvco()801 fracr = mmio_read_32(rcc_base + pll->pllxfracr); in stm32mp1_pll_get_fvco()853 uintptr_t rcc_base = stm32mp_rcc_base(); in get_clock_rate() local[all …]
908 uintptr_t rcc_base = priv->base; in timer_recalc_rate() local910 prescaler = mmio_read_32(rcc_base + cfg->apbdiv) & in timer_recalc_rate()913 timpre = mmio_read_32(rcc_base + cfg->timpre) & in timer_recalc_rate()
1020 uintptr_t rcc_base = stm32mp_rcc_base(); in stm32mp1_set_hsidiv() local1021 uintptr_t address = rcc_base + RCC_OCRDYR; in stm32mp1_set_hsidiv()1023 mmio_clrsetbits_32(rcc_base + RCC_HSICFGR, in stm32mp1_set_hsidiv()
211 uintptr_t rcc_base; in bl2_el3_plat_arch_setup() local233 rcc_base = stm32mp_rcc_base(); in bl2_el3_plat_arch_setup()247 if ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_RTCSRC_MASK) == 0U) { in bl2_el3_plat_arch_setup()248 mmio_setbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); in bl2_el3_plat_arch_setup()250 while ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_VSWRST) == in bl2_el3_plat_arch_setup()255 mmio_clrbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); in bl2_el3_plat_arch_setup()260 mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT); in bl2_el3_plat_arch_setup()268 mmio_clrsetbits_32(rcc_base + RCC_RDLSICR, in bl2_el3_plat_arch_setup()
