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Searched refs:PLAT_NS_IMAGE_OFFSET (Results 1 – 23 of 23) sorted by relevance

/trusted-firmware-a-latest/plat/intel/soc/common/
Dbl2_plat_mem_params_desc.c84 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
88 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
90 0x0 + 0x40000000 - PLAT_NS_IMAGE_OFFSET,
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/
Dimx8mm_bl2_mem_params_desc.c76 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
82 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
Dimx8mm_bl31_setup.c165 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mp/
Dimx8mp_bl2_mem_params_desc.c76 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
82 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
Dimx8mp_bl31_setup.c158 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/intel/soc/common/include/
Dplatform_def.h36 #define PLAT_NS_IMAGE_OFFSET 0x80200000 macro
38 #define PLAT_NS_IMAGE_OFFSET PRELOADED_BL33_BASE macro
43 #define PLAT_NS_IMAGE_OFFSET 0x10000000 macro
/trusted-firmware-a-latest/plat/intel/soc/common/aarch64/
Dplatform_common.c22 return PLAT_NS_IMAGE_OFFSET; in socfpga_get_ns_image_entrypoint()
/trusted-firmware-a-latest/plat/imx/imx93/include/
Dplatform_def.h36 #define PLAT_NS_IMAGE_OFFSET U(0x80200000) macro
37 #define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000)
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mq/include/
Dplatform_def.h41 #define PLAT_NS_IMAGE_OFFSET U(0x40200000) macro
42 #define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000)
/trusted-firmware-a-latest/plat/imx/imx8qx/include/
Dplatform_def.h67 #define PLAT_NS_IMAGE_OFFSET 0x80020000 macro
/trusted-firmware-a-latest/plat/imx/imx8qm/include/
Dplatform_def.h69 #define PLAT_NS_IMAGE_OFFSET 0x80020000 macro
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/include/
Dplatform_def.h63 #define PLAT_NS_IMAGE_OFFSET U(0x40200000) macro
66 #define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000)
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mn/include/
Dplatform_def.h48 #define PLAT_NS_IMAGE_OFFSET U(0x40200000) macro
50 #define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000)
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mp/include/
Dplatform_def.h65 #define PLAT_NS_IMAGE_OFFSET U(0x40200000) macro
68 #define BL32_FDT_OVERLAY_ADDR (PLAT_NS_IMAGE_OFFSET + 0x3000000)
/trusted-firmware-a-latest/plat/imx/imx93/
Dimx93_bl31_setup.c73 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
Dimx93_psci.c31 if (ns_entrypoint < PLAT_NS_IMAGE_OFFSET) { in imx_validate_ns_entrypoint()
/trusted-firmware-a-latest/plat/imx/imx8m/
Dimx8m_psci_common.c35 if (ns_entrypoint < PLAT_NS_IMAGE_OFFSET) in imx_validate_ns_entrypoint()
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mn/
Dimx8mn_bl31_setup.c169 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/imx/common/
Dimx_sip_handler.c233 if (x1 < (PLAT_NS_IMAGE_OFFSET & 0xF0000000)) in imx_kernel_entry_handler()
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mq/
Dimx8mq_bl31_setup.c168 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/intel/soc/agilex5/
Dbl31_plat_setup.c209 return PLAT_NS_IMAGE_OFFSET; in plat_get_ns_image_entrypoint()
/trusted-firmware-a-latest/plat/imx/imx8qx/
Dimx8qx_bl31_setup.c338 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/imx/imx8qm/
Dimx8qm_bl31_setup.c354 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()