Home
last modified time | relevance | path

Searched refs:DEVICE1_BASE (Results 1 – 23 of 23) sorted by relevance

/trusted-firmware-a-latest/plat/arm/board/fvp/
Dfvp_def.h57 #define DEVICE1_BASE UL(0x2e000000) macro
60 #define DEVICE1_BASE BASE_GICD_BASE macro
Dfvp_common.c50 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
/trusted-firmware-a-latest/plat/qemu/common/
Dqemu_common.c22 #ifdef DEVICE1_BASE
23 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
Dqemu_spm.c18 #define MAP_DEVICE1_EL0 MAP_REGION_FLAT(DEVICE1_BASE, \
/trusted-firmware-a-latest/plat/intel/soc/stratix10/include/
Dsocfpga_plat_def.h54 #define DEVICE1_BASE (0x80000000) macro
/trusted-firmware-a-latest/plat/xilinx/versal/aarch64/
Dversal_common.c29 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
/trusted-firmware-a-latest/plat/intel/soc/agilex/include/
Dsocfpga_plat_def.h55 #define DEVICE1_BASE (0x80000000) macro
/trusted-firmware-a-latest/plat/intel/soc/n5x/include/
Dsocfpga_plat_def.h56 #define DEVICE1_BASE (0x80000000) macro
/trusted-firmware-a-latest/plat/arm/board/fvp_r/
Dfvp_r_def.h46 #define DEVICE1_BASE UL(0xae000000) macro
Dfvp_r_common.c45 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
/trusted-firmware-a-latest/plat/xilinx/versal/include/
Dversal_def.h44 #define DEVICE1_BASE 0xF9000000 macro
/trusted-firmware-a-latest/include/plat/nuvoton/npcm845x/
Dplatform_def.h152 #define DEVICE1_BASE BASE_GICD_BASE macro
168 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, \
/trusted-firmware-a-latest/plat/xilinx/versal_net/aarch64/
Dversal_net_common.c30 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
/trusted-firmware-a-latest/plat/xilinx/zynqmp/aarch64/
Dzynqmp_common.c32 { DEVICE1_BASE, DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
/trusted-firmware-a-latest/plat/intel/soc/agilex/
Dbl2_plat_setup.c39 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
Dbl31_plat_setup.c145 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_NS),
/trusted-firmware-a-latest/plat/xilinx/versal_net/include/
Dversal_net_def.h97 #define DEVICE1_BASE U(0xE2000000) /* gic */ macro
/trusted-firmware-a-latest/plat/intel/soc/stratix10/
Dbl2_plat_setup.c38 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
Dbl31_plat_setup.c133 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
/trusted-firmware-a-latest/plat/intel/soc/n5x/
Dbl31_plat_setup.c126 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
/trusted-firmware-a-latest/plat/qemu/qemu/include/
Dplatform_def.h233 #define DEVICE1_BASE 0x09000000 macro
/trusted-firmware-a-latest/plat/qemu/qemu_sbsa/include/
Dplatform_def.h209 #define DEVICE1_BASE 0x60000000 macro
/trusted-firmware-a-latest/plat/xilinx/zynqmp/include/
Dzynqmp_def.h36 #define DEVICE1_BASE U(0xF9000000) macro