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Searched refs:ALIGN (Results 1 – 22 of 22) sorted by relevance

/trusted-firmware-a-latest/include/common/
Dbl_common.ld.h25 . = ALIGN(STRUCT_ALIGN); \
31 . = ALIGN(STRUCT_ALIGN); \
37 . = ALIGN(STRUCT_ALIGN); \
44 . = ALIGN(STRUCT_ALIGN); \
54 . = ALIGN(STRUCT_ALIGN); \
62 . = ALIGN(STRUCT_ALIGN); \
68 . = ALIGN(STRUCT_ALIGN); \
79 . = ALIGN(STRUCT_ALIGN); \
91 . = ALIGN(16); \
121 .data . : ALIGN(DATA_ALIGN) { \
[all …]
/trusted-firmware-a-latest/plat/rockchip/rk3399/include/
Dplat.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
32 .incbin_sram : ALIGN(PAGE_SIZE) {
36 . = ALIGN(PAGE_SIZE); define
42 .text_sram : ALIGN(PAGE_SIZE) {
47 . = ALIGN(PAGE_SIZE); define
53 .data_sram : ALIGN(PAGE_SIZE) {
57 . = ALIGN(PAGE_SIZE); define
63 .stack_sram : ALIGN(PAGE_SIZE) {
77 ASSERT(. == ALIGN(64 * 1024),
87 . = ALIGN(4096); define
/trusted-firmware-a-latest/bl31/
Dbl31.ld.S33 ASSERT(. == ALIGN(PAGE_SIZE),
47 . = ALIGN(PAGE_SIZE); define
63 . = ALIGN(8); define
68 . = ALIGN(PAGE_SIZE); define
82 . = ALIGN(8); define
95 . = ALIGN(PAGE_SIZE); define
118 .spm_shim_exceptions : ALIGN(PAGE_SIZE) {
123 . = ALIGN(PAGE_SIZE); define
146 . = ALIGN(PAGE_SIZE); define
155 ASSERT(. == ALIGN(PAGE_SIZE),
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/trusted-firmware-a-latest/plat/rockchip/rk3288/include/
Dplat_sp_min.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
22 .text_sram : ALIGN(PAGE_SIZE) {
27 . = ALIGN(PAGE_SIZE); define
33 .data_sram : ALIGN(PAGE_SIZE) {
37 . = ALIGN(PAGE_SIZE); define
43 .stack_sram : ALIGN(PAGE_SIZE) {
57 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a-latest/plat/mediatek/include/
Dplat.ld.rodata.inc11 . = ALIGN(32);
14 . = ALIGN(32);
18 . = ALIGN(8);
22 . = ALIGN(32);
26 . = ALIGN(8);
/trusted-firmware-a-latest/bl32/sp_min/
Dsp_min.ld.S27 ASSERT(. == ALIGN(PAGE_SIZE),
39 . = ALIGN(PAGE_SIZE); define
59 . = ALIGN(8); define
64 . = ALIGN(PAGE_SIZE); define
78 . = ALIGN(8); define
91 . = ALIGN(PAGE_SIZE); define
122 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
139 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/bl2u/
Dbl2u.ld.S25 ASSERT(. == ALIGN(PAGE_SIZE),
37 . = ALIGN(PAGE_SIZE); define
58 . = ALIGN(PAGE_SIZE); define
80 . = ALIGN(PAGE_SIZE); define
100 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
110 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/bl32/tsp/
Dtsp.ld.S23 ASSERT(. == ALIGN(PAGE_SIZE),
35 . = ALIGN(PAGE_SIZE); define
48 . = ALIGN(PAGE_SIZE); define
71 . = ALIGN(PAGE_SIZE); define
97 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
107 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/bl2/
Dbl2.ld.S23 ASSERT(. == ALIGN(PAGE_SIZE),
40 . = ALIGN(PAGE_SIZE); define
62 . = ALIGN(PAGE_SIZE); define
85 . = ALIGN(PAGE_SIZE); define
105 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
115 . = ALIGN(PAGE_SIZE); define
Dbl2_el3.ld.S42 ASSERT(. == ALIGN(PAGE_SIZE),
47 ASSERT(. == ALIGN(PAGE_SIZE),
70 . = ALIGN(PAGE_SIZE); define
83 . = ALIGN(PAGE_SIZE); define
114 . = ALIGN(PAGE_SIZE); define
127 ASSERT(BL2_RW_BASE == ALIGN(PAGE_SIZE),
166 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
178 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/bl1/
Dbl1.ld.S34 ASSERT(. == ALIGN(PAGE_SIZE),
46 . = ALIGN(PAGE_SIZE); define
79 . = ALIGN(16); define
100 . = ALIGN(16); define
110 ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE),
129 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
139 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/include/plat/arm/common/
Darm_tzc_dram.ld.S18 ASSERT(. == ALIGN(PAGE_SIZE),
20 .el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) {
25 . = ALIGN(PAGE_SIZE); define
Darm_reclaim_init.ld.S13 . = ALIGN(PAGE_SIZE); define
17 INIT_CODE_END_ALIGNED = ALIGN(PAGE_SIZE);
40 . = ALIGN(PAGE_SIZE); \
/trusted-firmware-a-latest/services/std_svc/rmmd/trp/
Dlinker.ld.S29 . = ALIGN(8); define
33 . = ALIGN(PAGE_SIZE_4K); define
39 . = ALIGN(PAGE_SIZE_4K); define
/trusted-firmware-a-latest/plat/st/stm32mp1/
Dstm32mp1.ld.S31 . = ALIGN(4); define
37 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/plat/st/stm32mp2/aarch64/
Dstm32mp2.ld.S31 . = ALIGN(4); define
37 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a-latest/plat/arm/board/arm_fpga/
Dbuild_axf.ld.S35 ASSERT(. == ALIGN(PAGE_SIZE), "BL31_BASE is not page aligned");
40 ASSERT(. == ALIGN(8), "DTB address is not 8-byte aligned");
/trusted-firmware-a-latest/plat/rockchip/rk3399/drivers/m0/src/
Drk3399m0.ld.S21 . = ALIGN(8); define
/trusted-firmware-a-latest/plat/socionext/synquacer/include/
Dplat.ld.S26 .sp_xlat_table (NOLOAD) : ALIGN(PAGE_SIZE) {
/trusted-firmware-a-latest/plat/rockchip/rk3328/include/
Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a-latest/plat/rockchip/rk3368/include/
Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a-latest/plat/rockchip/px30/include/
Dplat.ld.S24 ASSERT(. == ALIGN(64 * 1024),