Searched refs:up (Results 1 – 25 of 89) sorted by relevance
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46 FIP_IMAGE_ID -up-|> plat_io_policy47 BL2_IMAGE_ID -up-|> plat_io_policy48 xxx_IMAGE_ID -up-|> plat_io_policy
141 config.json .up.> SP_vendor_1142 config.json .up.> SP_vendor_2
6 Cortex-A76 can operate at up to 2.05 GHz.7 Cortex-A55 can operate at up to 2.0 GHz.
6 Cortex-A76 can operate at up to 2.2 GHz.7 Cortex-A55 can operate at up to 2.0 GHz.
6 Cortex-A76 can operate at up to 2.2 GHz.7 Cortex-A55 can operate at up to 2 GHz.
6 Cortex-A78 can operate at up to 2.6 GHz.7 Cortex-A55 can operate at up to 2.0 GHz.
6 Both clusters can operate at up to 2 GHz.
13 - GICv2 driver set up.
54 bias-pull-up;64 bias-pull-up;94 bias-pull-up;108 bias-pull-up;
31 bias-pull-up;86 bias-pull-up;96 bias-pull-up;130 bias-pull-up;134 bias-pull-up;146 bias-pull-up;150 bias-pull-up;164 bias-pull-up;170 bias-pull-up;203 bias-pull-up;[all …]
62 bias-pull-up;182 bias-pull-up;185 bias-pull-up;235 bias-pull-up;
7 /* Configuration: max 4 clusters with up to 4 CPUs */
7 /* Configuration: max 4 clusters with up to 4 CPUs with 1 thread per each */
68 bias-pull-up;72 bias-pull-up;
7 /* DynamIQ configuration: 1 cluster with up to 8 CPUs with 2 threads per each */
7 /* DynamIQ configuration: 1 cluster with up to 8 CPUs */
309 * SD bus pull-up resistors:314 bias-pull-up;317 bias-pull-up;
48 FUSE_FIP_ARGS += --fuse-up ${BUILD_PLAT}/${FUSE_UP_FILE_SB}51 FUSE_FIP_ARGS += --fuse-up ${FUSE_UP_FILE}
13 It includes details on image flashing, fuse provisioning and trusted board boot-up.
1890 uint32_t dataL, down, up; in opencheck_SSI_WS6() local1924 up = (mmio_read_32(GPIO_INDT6) >> 15) & 0x1; in opencheck_SSI_WS6()1932 if (down == up) { in opencheck_SSI_WS6()
33 bug-fixes but may wait up to a week to merge major changes, or ones requiring50 several things over the course of a few days, it might take up to a week.58 1-2 days later. This whole process could take up 4 weeks. Please refer to the
10 sets up the |AMU| prior to its exit from EL3, and will save and restore
