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/trusted-firmware-a-3.7.0/lib/coreboot/
Dcoreboot_table.c99 coreboot_memrange_t *range = &coreboot_memranges[i]; in coreboot_get_memory_type() local
101 if (range->type == CB_MEM_NONE) in coreboot_get_memory_type()
103 if ((start >= range->start) && in coreboot_get_memory_type()
104 (start - range->start < range->size) && in coreboot_get_memory_type()
105 (size <= range->size - (start - range->start))) { in coreboot_get_memory_type()
106 return range->type; in coreboot_get_memory_type()
/trusted-firmware-a-3.7.0/fdts/
Dfvp-ve-Cortex-A5x1.dts84 freq-range = <50000000 100000000>;
93 freq-range = <5000000 50000000>;
102 freq-range = <80000000 120000000>;
111 freq-range = <23750000 165000000>;
120 freq-range = <80000000 80000000>;
129 freq-range = <25000000 60000000>;
Dn1sdp.dtsi159 bus-range = <0 17>;
182 bus-range = <0 17>;
Dn1sdp-multi-chip.dts73 bus-range = <0 0xff>;
Dmorello-soc.dts158 bus-range = <0 255>;
194 bus-range = <0 255>;
Drtsm_ve-motherboard.dtsi50 freq-range = <23750000 63500000>;
/trusted-firmware-a-3.7.0/plat/renesas/common/
Dplat_pm.c49 unsigned long range; in rcar_program_mailbox() local
52 range = (unsigned long)&rcar_mboxes[linear_id]; in rcar_program_mailbox()
54 flush_dcache_range(range, sizeof(range)); in rcar_program_mailbox()
/trusted-firmware-a-3.7.0/docs/plat/
Dxilinx-zynqmp.rst48 With DEBUG=1, TF-A for ZynqMP uses DDR memory range instead of OCM memory range
52 above memory range will NOT be reserved in device tree.
54 To reserve the above memory range in device tree, the device tree base address
70 range OR let TF-A modify the device tree on the run.
82 When FSBL runs on RPU and TF-A is to be placed in DDR address range,
Drz-g2.rst12 cover the full product range, from the premium class to the entry
Drcar-gen3.rst9 cover the full product range, from the premium class to the entry
/trusted-firmware-a-3.7.0/tools/marvell/doimage/secure/
Dsec_img_7K.cfg14 # index of CSK key in the array. Valid range is 0 to 15
Dsec_img_8K.cfg14 # index of CSK key in the array. Valid range is 0 to 15
/trusted-firmware-a-3.7.0/docs/getting_started/
Drt-svc-writers-guide.rst38 are allocated a range of of OENs. The OEN must be interpreted in conjunction
63 range as they need - it is not necessary to coordinate with other entities of
65 within the SiP Service calls OEN range to mean different things - as these
92 the name of the service, the range of OENs covered, the type of service and
290 ``0xC4000000``-``0xC400FFFF`` functions. Within that range, the `PSCI`_ service
/trusted-firmware-a-3.7.0/docs/design/
Dpsci-pd-tree.rst157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
171 is equal to the size of the range of MPIDRs allocated. This approach will
199 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
Dfirmware-design.rst841 Each implemented service handles a range of SMC function identifiers as
848 the name of the service, the range of OENs covered, the type of service and
890 #. Multiple descriptors for the same range of OENs and ``call_type``
891 #. Incorrect range of owning entity numbers for a given ``call_type``
902 128 distinct services, but in practice a single descriptor can cover a range of
2194 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
/trusted-firmware-a-3.7.0/plat/rockchip/rk3399/drivers/dram/
Ddram_spec_timing.h59 #define range(mi, val, ma) (((ma) > (val)) ? (max(mi, val)) : (ma)) macro
/trusted-firmware-a-3.7.0/lib/romlib/
Dromlib_generator.py211 for item_index in range(0, len(index_file_parser.items)):
/trusted-firmware-a-3.7.0/docs/security_advisories/
Dsecurity-advisory-tfv-7.rst77 ``SMCCC_ARCH_WORKAROUND_2`` in the Arm architectural range to allow callers at
Dsecurity-advisory-tfv-4.rst48 range. Therefore, any AArch32 code relying on this macro to detect such integer
Dsecurity-advisory-tfv-10.rst108 which greatly reduces the range of inputs it will ever receive and thus the
/trusted-firmware-a-3.7.0/docs/components/
Darm-sip-service.rst12 - Use SMC function IDs that fall in the SiP range, which are ``0xc2000000`` -
Dsecure-partition-manager.rst487 If the field specifies "memory" the range is secure, else if it specifies
595 state of the range that it relates to. I.e. non-secure memory shall be
596 part of a non-secure memory range, and secure memory shall be contained
597 in a secure memory range of a given platform.
774 donates a SGI ID chosen from the secure SGI IDs range and configures it as
Dsecure-partition-manager-mm.rst55 - A range of synchronous exceptions (e.g. SMC function identifiers).
300 Secure Service calls range (see `SMC Calling Convention`_ (*Arm DEN 0028B*)
/trusted-firmware-a-3.7.0/docs/plat/marvell/armada/
Dbuild.rst99 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
131 values with CP_NUM are in a range of 1 to 3.
/trusted-firmware-a-3.7.0/docs/plat/arm/
Darm-build-options.rst132 to select the appropriate platform variant for the build. The range of

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