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Searched refs:PLAT_ARM_FLASH_IMAGE_BASE (Results 1 – 13 of 13) sorted by relevance

/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp_r/
Dfvp_r_err.c27 (void)nor_unlock(PLAT_ARM_FLASH_IMAGE_BASE); in plat_arm_error_handler()
28 ret = nor_word_program(PLAT_ARM_FLASH_IMAGE_BASE, 0); in plat_arm_error_handler()
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/css/sgi/include/
Dsgi_soc_css_def.h41 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE macro
Dsgi_soc_css_def_v2.h186 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE macro
/trusted-firmware-a-3.6.0-3.5.0/include/plat/arm/board/common/
Dboard_css_def.h47 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/common/fconf/
Darm_fconf_io.c32 .offset = PLAT_ARM_FLASH_IMAGE_BASE + PLAT_ARM_FIP_OFFSET_IN_GPT,
34 .offset = PLAT_ARM_FLASH_IMAGE_BASE,
41 .offset = PLAT_ARM_FLASH_IMAGE_BASE,
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/morello/include/
Dplatform_def.h31 #define PLAT_ARM_FLASH_IMAGE_BASE ULL(0x1A000000) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/n1sdp/include/
Dplatform_def.h34 #define PLAT_ARM_FLASH_IMAGE_BASE 0x18200000 macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/common/
Darm_io_storage.c181 spec->offset = PLAT_ARM_FLASH_IMAGE_BASE + entry->start; in arm_set_image_source()
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp_r/include/
Dplatform_def.h182 #define PLAT_ARM_FLASH_IMAGE_BASE (PLAT_ARM_DRAM1_BASE + UL(0x40000000)) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/a5ds/include/
Dplatform_def.h318 #define PLAT_ARM_FLASH_IMAGE_BASE BOOT_BASE macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp_ve/include/
Dplatform_def.h306 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH1_BASE macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/corstone1000/common/include/
Dplatform_def.h184 #define PLAT_ARM_FLASH_IMAGE_BASE PLAT_ARM_FIP_BASE_BANK0 macro
/trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp/include/
Dplatform_def.h290 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE macro