Home
last modified time | relevance | path

Searched refs:CPU_PWR_STATUS (Results 1 – 8 of 8) sorted by relevance

/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/drivers/cpu_pm/cpcv3_2/
Dmt_smp.h13 #define CPU_PWR_STATUS (MCUCFG_BASE + 0xA840) macro
Dmt_smp.c21 return !!(mmio_read_32(CPU_PWR_STATUS) & BIT(cpuid)); in is_core_power_status_on()
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8195/drivers/spm/
Dmt_spm_conservation.c64 INFO("cpu_pwr = 0x%x 0x%x\n", mmio_read_32(CPU_PWR_STATUS), in go_to_spm_before_wfi()
Dmt_spm_reg.h95 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8188/include/
Dspm_reg.h84 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8186/drivers/spm/
Dmt_spm_reg.h89 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8183/drivers/spm/
Dspm.h106 #define CPU_PWR_STATUS (SPM_BASE + 0x188) macro
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8192/drivers/spm/
Dmt_spm_reg.h98 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro