Searched refs:ARM_DRAM2_BASE (Results 1 – 13 of 13) sorted by relevance
| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp/ |
| D | fvp_drtm_addr.c | 28 } else if ((region_start >= ARM_DRAM2_BASE) && in plat_drtm_validate_ns_region()
29 (region_start < (ARM_DRAM2_BASE + ARM_DRAM2_SIZE)) && in plat_drtm_validate_ns_region()
30 (region_end >= ARM_DRAM2_BASE) && in plat_drtm_validate_ns_region()
31 (region_end < (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) { in plat_drtm_validate_ns_region()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/morello/ |
| D | morello_bl2_setup.c | 44 ARM_DRAM2_BASE, ARM_DRAM2_BASE + dram2_size); in dmc_ecc_setup()
45 zero_normalmem((void *)ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
46 flush_dcache_range(ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
86 ARM_DRAM2_BASE; in dmc_ecc_setup()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/juno/ |
| D | juno_ethosn_tzmp1_def.h | 19 #define JUNO_ETHOSN_FW_TZC_PROT_DRAM2_BASE (ARM_DRAM2_BASE)
20 #define JUNO_ETHOSN_FW_TZC_PROT_DRAM2_END (ARM_DRAM2_BASE + \
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| D | juno_security.c | 53 {ARM_DRAM2_BASE, ARM_DRAM2_END,
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/n1sdp/ |
| D | n1sdp_bl2_setup.c | 41 zero_normalmem((void *)ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
42 flush_dcache_range(ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/common/ |
| D | arm_pm.c | 127 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint < in arm_validate_ns_entrypoint()
128 (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) { in arm_validate_ns_entrypoint()
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| D | arm_nor_psci_mem_protect.c | 29 {ARM_DRAM2_BASE, 1u << ONE_GB_SHIFT},
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/fvp_ve/include/ |
| D | platform_def.h | 29 #define ARM_DRAM2_BASE PLAT_ARM_DRAM2_BASE macro
31 #define ARM_DRAM2_END (ARM_DRAM2_BASE + \
101 ARM_DRAM2_BASE, \
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| /trusted-firmware-a-3.6.0-3.5.0/include/plat/arm/common/ |
| D | arm_pas_def.h | 79 #define ARM_PAS_4_BASE ARM_DRAM2_BASE
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| D | plat_arm.h | 48 {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
63 {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
72 {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
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| D | arm_def.h | 257 #define ARM_DRAM2_BASE PLAT_ARM_DRAM2_BASE macro
259 #define ARM_DRAM2_END (ARM_DRAM2_BASE + \
313 ARM_DRAM2_BASE, \
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/css/sgi/include/ |
| D | sgi_base_platform_def.h | 279 {CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM2_BASE, \
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| /trusted-firmware-a-3.6.0-3.5.0/plat/arm/board/corstone1000/common/include/ |
| D | platform_def.h | 104 #define ARM_DRAM2_BASE ARM_DRAM1_BASE macro
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