/trusted-firmware-a-3.4.0/plat/imx/common/ |
D | imx8_psci.c | 33 psci_power_state_t *req_state) in imx_validate_power_state() argument 43 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state() 47 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 53 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 59 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in imx_get_sys_suspend_power_state() 60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/imx/imx8m/imx8mq/ |
D | imx8mq_psci.c | 20 psci_power_state_t *req_state) in imx_validate_power_state() argument 30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 35 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 98 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 103 req_state->pwr_domain_state[i] = PLAT_STOP_OFF_STATE; in imx_get_sys_suspend_power_state() 105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/arm/common/ |
D | arm_pm.c | 25 psci_power_state_t *req_state) in arm_validate_power_state() argument 31 assert(req_state != NULL); in arm_validate_power_state() 45 req_state->pwr_domain_state[ARM_PWR_LVL0] = in arm_validate_power_state() 49 req_state->pwr_domain_state[i] = in arm_validate_power_state() 69 psci_power_state_t *req_state) in arm_validate_power_state() argument 74 assert(req_state != NULL); in arm_validate_power_state() 95 req_state->pwr_domain_state[i++] = state_id & in arm_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/allwinner/common/ |
D | sunxi_scpi_pm.c | 129 psci_power_state_t *req_state) in sunxi_validate_power_state() argument 136 assert(req_state != NULL); in sunxi_validate_power_state() 150 req_state->pwr_domain_state[i] = local_pstate; in sunxi_validate_power_state() 156 req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN; in sunxi_validate_power_state() 162 static void sunxi_get_sys_suspend_power_state(psci_power_state_t *req_state) in sunxi_get_sys_suspend_power_state() argument 164 assert(req_state != NULL); in sunxi_get_sys_suspend_power_state() 167 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in sunxi_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/xilinx/versal/ |
D | plat_psci.c | 192 psci_power_state_t *req_state) in versal_validate_power_state() argument 198 assert(req_state); in versal_validate_power_state() 202 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state() 204 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal_validate_power_state() 220 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) in versal_get_sys_suspend_power_state() argument 222 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state() 223 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/hisilicon/poplar/ |
D | plat_pm.c | 110 psci_power_state_t *req_state) in poplar_validate_power_state() argument 116 assert(req_state); in poplar_validate_power_state() 120 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in poplar_validate_power_state() 122 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in poplar_validate_power_state() 143 static void poplar_get_sys_suspend_power_state(psci_power_state_t *req_state) in poplar_get_sys_suspend_power_state() argument 148 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in poplar_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/imx/imx8m/ |
D | imx8m_psci_common.c | 69 psci_power_state_t *req_state) in imx_validate_power_state() argument 79 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 80 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 84 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 85 CLUSTER_PWR_STATE(req_state) = PLAT_WAIT_RET_STATE; in imx_validate_power_state() 154 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 159 req_state->pwr_domain_state[i] = PLAT_STOP_OFF_STATE; in imx_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/xilinx/zynqmp/ |
D | plat_psci.c | 175 psci_power_state_t *req_state) in zynqmp_validate_power_state() argument 181 assert(req_state); in zynqmp_validate_power_state() 185 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state() 187 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in zynqmp_validate_power_state() 197 static void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state) in zynqmp_get_sys_suspend_power_state() argument 199 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state() 200 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/nvidia/tegra/common/ |
D | tegra_pm.c | 37 static void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state) in tegra_get_sys_suspend_power_state() argument 41 req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN; in tegra_get_sys_suspend_power_state() 240 psci_power_state_t *req_state) in tegra_validate_power_state() argument 242 assert(req_state != NULL); in tegra_validate_power_state() 244 return tegra_soc_validate_power_state(power_state, req_state); in tegra_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/imx/common/include/ |
D | plat_imx8.h | 29 psci_power_state_t *req_state); 30 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
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/trusted-firmware-a-3.4.0/plat/hisilicon/hikey/ |
D | hikey_pm.c | 163 static void hikey_get_sys_suspend_power_state(psci_power_state_t *req_state) in hikey_get_sys_suspend_power_state() argument 168 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey_get_sys_suspend_power_state() 215 psci_power_state_t *req_state) in hikey_validate_power_state() argument 221 assert(req_state); in hikey_validate_power_state() 235 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey_validate_power_state() 239 req_state->pwr_domain_state[i] = in hikey_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/arm/css/common/ |
D | css_pm.c | 267 void css_get_sys_suspend_power_state(psci_power_state_t *req_state) in css_get_sys_suspend_power_state() argument 278 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF; in css_get_sys_suspend_power_state() 295 psci_power_state_t *req_state) in css_validate_power_state() argument 298 rc = arm_validate_power_state(power_state, req_state); in css_validate_power_state() 314 req_state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] = in css_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/renesas/common/ |
D | plat_pm.c | 252 psci_power_state_t *req_state) in rcar_validate_power_state() argument 262 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in rcar_validate_power_state() 265 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_validate_power_state() 275 static void rcar_get_sys_suspend_power_state(psci_power_state_t *req_state) in rcar_get_sys_suspend_power_state() argument 284 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_get_sys_suspend_power_state() 289 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PSCI_LOCAL_STATE_RUN; in rcar_get_sys_suspend_power_state() 291 req_state->pwr_domain_state[i] = PLAT_MAX_RET_STATE; in rcar_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/rockchip/common/ |
D | plat_pm.c | 133 psci_power_state_t *req_state) in rockchip_validate_power_state() argument 139 assert(req_state); in rockchip_validate_power_state() 153 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in rockchip_validate_power_state() 157 req_state->pwr_domain_state[i] = in rockchip_validate_power_state() 161 req_state->pwr_domain_state[i] = in rockchip_validate_power_state() 172 void rockchip_get_sys_suspend_power_state(psci_power_state_t *req_state) in rockchip_get_sys_suspend_power_state() argument 177 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rockchip_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/mediatek/mt8173/ |
D | plat_pm.c | 434 static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) in plat_get_sys_suspend_power_state() argument 439 req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; in plat_get_sys_suspend_power_state() 470 psci_power_state_t *req_state) in plat_validate_power_state() argument 476 assert(req_state); in plat_validate_power_state() 490 req_state->pwr_domain_state[MTK_PWR_LVL0] = in plat_validate_power_state() 494 req_state->pwr_domain_state[i] = in plat_validate_power_state() 508 psci_power_state_t *req_state) in plat_validate_power_state() argument 513 assert(req_state); in plat_validate_power_state() 534 req_state->pwr_domain_state[i++] = state_id & in plat_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/qti/common/src/ |
D | qti_pm.c | 79 psci_power_state_t *req_state) in qti_validate_power_state() argument 84 assert(req_state); in qti_validate_power_state() 105 req_state->pwr_domain_state[i++] = state_id & in qti_validate_power_state() 230 void qti_get_sys_suspend_power_state(psci_power_state_t *req_state) in qti_get_sys_suspend_power_state() argument 246 req_state->pwr_domain_state[i++] = in qti_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/intel/soc/common/ |
D | socfpga_psci.c | 180 psci_power_state_t *req_state) in socfpga_validate_power_state() argument 193 void socfpga_get_sys_suspend_power_state(psci_power_state_t *req_state) in socfpga_get_sys_suspend_power_state() argument 195 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in socfpga_get_sys_suspend_power_state() 196 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in socfpga_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/hisilicon/hikey960/ |
D | hikey960_pm.c | 139 psci_power_state_t *req_state) in hikey960_validate_power_state() argument 145 assert(req_state); in hikey960_validate_power_state() 159 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey960_validate_power_state() 163 req_state->pwr_domain_state[i] = in hikey960_validate_power_state() 289 static void hikey960_get_sys_suspend_power_state(psci_power_state_t *req_state) in hikey960_get_sys_suspend_power_state() argument 294 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey960_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/arm/board/fvp/ |
D | fvp_pm.c | 387 static void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state) in fvp_get_sys_suspend_power_state() argument 392 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF; in fvp_get_sys_suspend_power_state() 405 psci_power_state_t *req_state) in fvp_validate_power_state() argument 408 rc = arm_validate_power_state(power_state, req_state); in fvp_validate_power_state() 415 req_state->pwr_domain_state[ARM_PWR_LVL2] = ARM_LOCAL_STATE_RUN; in fvp_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/st/stm32mp1/ |
D | stm32mp1_pm.c | 162 psci_power_state_t *req_state) in stm32_validate_power_state() argument 178 req_state->pwr_domain_state[0] = ARM_LOCAL_STATE_RET; in stm32_validate_power_state() 179 req_state->pwr_domain_state[1] = ARM_LOCAL_STATE_RUN; in stm32_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/mediatek/mt8183/ |
D | plat_pm.c | 442 psci_power_state_t *req_state) in plat_mtk_validate_power_state() argument 447 assert(req_state); in plat_mtk_validate_power_state() 471 req_state->pwr_domain_state[i++] = state_id & in plat_mtk_validate_power_state() 482 psci_power_state_t *req_state) in plat_mtk_validate_power_state() argument 488 assert(req_state); in plat_mtk_validate_power_state() 502 req_state->pwr_domain_state[MTK_PWR_LVL0] = MTK_LOCAL_STATE_RET; in plat_mtk_validate_power_state() 507 req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; in plat_mtk_validate_power_state() 544 static void plat_mtk_get_sys_suspend_power_state(psci_power_state_t *req_state) in plat_mtk_get_sys_suspend_power_state() argument 549 req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; in plat_mtk_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/qemu/qemu_sbsa/ |
D | sbsa_pm.c | 77 psci_power_state_t *req_state) in qemu_validate_power_state() argument 82 assert(req_state != NULL); in qemu_validate_power_state() 105 req_state->pwr_domain_state[i++] = state_id & in qemu_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/qemu/common/ |
D | qemu_pm.c | 70 psci_power_state_t *req_state) in qemu_validate_power_state() argument 75 assert(req_state); in qemu_validate_power_state() 96 req_state->pwr_domain_state[i++] = state_id & in qemu_validate_power_state()
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/trusted-firmware-a-3.4.0/plat/mediatek/mt8192/ |
D | plat_pm.c | 296 psci_power_state_t *req_state) in plat_validate_power_state() argument 303 req_state->pwr_domain_state[0] = PLAT_MAX_RET_STATE; in plat_validate_power_state() 315 req_state->pwr_domain_state[i] = s; in plat_validate_power_state() 323 static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) in plat_get_sys_suspend_power_state() argument 329 req_state->pwr_domain_state[lv] = PLAT_MAX_OFF_STATE; in plat_get_sys_suspend_power_state()
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/trusted-firmware-a-3.4.0/plat/mediatek/mt8195/ |
D | plat_pm.c | 294 psci_power_state_t *req_state) in plat_validate_power_state() argument 305 req_state->pwr_domain_state[0] = PLAT_MAX_RET_STATE; in plat_validate_power_state() 317 req_state->pwr_domain_state[i] = s; in plat_validate_power_state() 325 static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) in plat_get_sys_suspend_power_state() argument 331 req_state->pwr_domain_state[lv] = PLAT_MAX_OFF_STATE; in plat_get_sys_suspend_power_state()
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