Home
last modified time | relevance | path

Searched refs:DRVCTRL20_MSIOF0_TXD (Results 1 – 8 of 8) sorted by relevance

/trusted-firmware-a-3.4.0/drivers/renesas/rcar/pfc/H3/
Dpfc_init_h3_v1.c388 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1076 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_h3_v1()
Dpfc_init_h3_v2.c390 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1109 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_h3_v2()
/trusted-firmware-a-3.4.0/drivers/renesas/rcar/pfc/M3N/
Dpfc_init_m3n.c392 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1111 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_m3n()
/trusted-firmware-a-3.4.0/drivers/renesas/rzg/pfc/G2H/
Dpfc_init_g2h.c392 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1196 DRVCTRL20_MSIOF0_TXD(7) | in pfc_init_g2h()
/trusted-firmware-a-3.4.0/drivers/renesas/rzg/pfc/G2N/
Dpfc_init_g2n.c392 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1192 DRVCTRL20_MSIOF0_TXD(7) | in pfc_init_g2n()
/trusted-firmware-a-3.4.0/drivers/renesas/rcar/pfc/M3/
Dpfc_init_m3.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1204 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_m3()
/trusted-firmware-a-3.4.0/drivers/renesas/rzg/pfc/G2M/
Dpfc_init_g2m.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1193 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_g2m()
/trusted-firmware-a-3.4.0/drivers/renesas/rcar/pfc/D3/
Dpfc_init_d3.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro