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/Zephyr-latest/tests/drivers/rtc/rtc_api_helpers/src/
Dtest_rtc_calibration_from_frequency.c11 uint32_t frequency; member
17 .frequency = 1000000000,
21 .frequency = 1000000001,
25 .frequency = 999999999,
29 .frequency = 2000000000,
33 .frequency = 500000000,
40 uint32_t frequency; in ZTEST() local
45 frequency = test_samples[i].frequency; in ZTEST()
47 result = rtc_calibration_from_frequency(frequency); in ZTEST()
/Zephyr-latest/tests/drivers/build_all/sensor/
Dspi.dtsi16 spi-max-frequency = <0>;
23 spi-max-frequency = <0>;
30 spi-max-frequency = <0>;
36 spi-max-frequency = <0>;
43 spi-max-frequency = <0>;
49 spi-max-frequency = <0>;
56 spi-max-frequency = <0>;
63 spi-max-frequency = <0>;
70 spi-max-frequency = <0>;
77 spi-max-frequency = <0>;
[all …]
/Zephyr-latest/subsys/logging/backends/
DKconfig.swo14 int "SWO reference clock frequency"
15 …default $(dt_node_int_prop_int,$(dt_nodelabel_path,itm),swo-ref-frequency) if $(dt_nodelabel_enabl…
16 …ault $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if $(dt_node_has_prop,/cpus/cpu@0,clock-f…
19 Set SWO reference frequency. In most cases it is equal to CPU
20 frequency.
23 int "Set SWO output frequency"
26 Set SWO output frequency. Value 0 will select maximum frequency
28 frequency SWO operation. In this case the frequency has to be set
32 viewer programs will configure SWO frequency when attached to the
34 reset. To ensure flawless operation the frequency configured here and
[all …]
/Zephyr-latest/tests/drivers/clock_control/nrf_clock_control/src/
Dmain.c21 .frequency = MHZ(128),
26 .frequency = MHZ(320),
31 .frequency = MHZ(64),
40 .frequency = MHZ(16),
45 .frequency = MHZ(16),
50 .frequency = MHZ(16),
66 .frequency = MHZ(16),
71 .frequency = MHZ(19),
76 .frequency = MHZ(16),
109 .frequency = MHZ(320),
[all …]
/Zephyr-latest/tests/drivers/build_all/adc/boards/
Dnative_sim.overlay41 clock-frequency = <100000>;
140 clock-frequency = <2000000>;
171 spi-max-frequency = <0>;
178 spi-max-frequency = <0>;
186 spi-max-frequency = <0>;
194 spi-max-frequency = <0>;
202 spi-max-frequency = <0>;
210 spi-max-frequency = <0>;
218 spi-max-frequency = <0>;
226 spi-max-frequency = <0>;
[all …]
/Zephyr-latest/tests/drivers/build_all/dac/
Dapp.overlay32 clock-frequency = <100000>;
108 clock-frequency = <2000000>;
133 spi-max-frequency = <0>;
149 spi-max-frequency = <0>;
165 spi-max-frequency = <0>;
181 spi-max-frequency = <0>;
188 spi-max-frequency = <0>;
195 spi-max-frequency = <0>;
203 spi-max-frequency = <0>;
211 spi-max-frequency = <0>;
[all …]
/Zephyr-latest/dts/riscv/starfive/
Dstarfive_jh7100_clk.dtsi11 clock-frequency = <125000000>;
17 clock-frequency = <125000000>;
23 clock-frequency = <100000000>;
29 clock-frequency = <74250000>;
/Zephyr-latest/drivers/clock_control/
Dclock_control_nrf2_hsfll.c32 uint32_t frequency; member
36 .frequency = HSFLL_FREQ_LOW,
40 .frequency = HSFLL_FREQ_MEDLOW,
44 .frequency = HSFLL_FREQ_HIGH,
107 uint32_t frequency; in hsfll_find_mgr() local
118 frequency = spec->frequency == NRF_CLOCK_CONTROL_FREQUENCY_MAX in hsfll_find_mgr()
120 : spec->frequency; in hsfll_find_mgr()
123 if (frequency > clock_options[i].frequency) { in hsfll_find_mgr()
227 .frequency = HSFLL_FREQ_LOW in dvfs_low_init()
/Zephyr-latest/tests/boards/espressif/rtc_clk/
DREADME.rst9 This test iterates through all the clock sources and checks if the expected frequency is being set.
51 CPU frequency: 240000000
52 RTC_FAST frequency: 17500000
53 RTC_SLOW frequency: 136000
55 Testing CPU frequency: 80 MHz
56 Testing CPU frequency: 160 MHz
57 Testing CPU frequency: 240 MHz
61 Testing CPU frequency: 40 MHz
62 Testing CPU frequency: 20 MHz
63 Testing CPU frequency: 10 MHz
[all …]
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dsam_e70_xplained_same70q21.overlay16 spi-max-frequency = <500000>;
21 spi-max-frequency = <1000000>;
34 spi-max-frequency = <500000>;
39 spi-max-frequency = <1000000>;
Dsam_v71_xult_samv71q21.overlay16 spi-max-frequency = <500000>;
21 spi-max-frequency = <1000000>;
34 spi-max-frequency = <500000>;
39 spi-max-frequency = <1000000>;
Dmec172xevb_assy6906.overlay10 clock-frequency = <12000000>;
17 spi-max-frequency = <500000>;
22 spi-max-frequency = <16000000>;
Ds32z2xxdc2_s32z270_rtu0.overlay23 clock-frequency = <100000000>;
29 spi-max-frequency = <500000>;
35 spi-max-frequency = <16000000>;
Ds32z2xxdc2_s32z270_rtu1.overlay23 clock-frequency = <100000000>;
29 spi-max-frequency = <500000>;
35 spi-max-frequency = <16000000>;
/Zephyr-latest/tests/drivers/spi/spi_loopback/
Doverlay-sam-spi-dma.overlay20 spi-max-frequency = <500000>;
25 spi-max-frequency = <1000000>;
38 spi-max-frequency = <500000>;
43 spi-max-frequency = <1000000>;
/Zephyr-latest/dts/arm/renesas/ra/ra2/
Dr7fa2l1xxxxfp.dtsi18 clock-frequency = <DT_FREQ_M(20)>;
25 clock-frequency = <DT_FREQ_M(48)>;
31 clock-frequency = <DT_FREQ_M(8)>;
37 clock-frequency = <32768>;
43 clock-frequency = <32768>;
60 clock-frequency = <48000000>;
/Zephyr-latest/dts/arm/ti/
Dj722s_main.dtsi43 clock-frequency = <48000000>;
53 clock-frequency = <48000000>;
63 clock-frequency = <48000000>;
73 clock-frequency = <48000000>;
83 clock-frequency = <48000000>;
93 clock-frequency = <48000000>;
103 clock-frequency = <48000000>;
/Zephyr-latest/soc/neorv32/
DKconfig23 bool "Read the NEORV32 clock frequency at runtime"
25 depends on !$(dt_node_has_prop,/cpus/cpu@0,clock-frequency)
30 If enabled, the NEORV32 clock frequency will be read from SYSINFO during boot. This
31 results in small overhead, which can be avoided by setting the clock-frequency property of
32 the cpu@0 devicetree node if the frequency is known at build-time.
/Zephyr-latest/dts/riscv/microchip/
Dmpfs.dtsi18 clock-frequency = <0>;
32 clock-frequency = <0>;
46 clock-frequency = <0>;
60 clock-frequency = <0>;
74 clock-frequency = <0>;
156 clock-frequency = <150000000>;
167 clock-frequency = <150000000>;
178 clock-frequency = <150000000>;
189 clock-frequency = <150000000>;
200 clock-frequency = <150000000>;
[all …]
/Zephyr-latest/boards/ite/it8xxx2_evb/
Dit8xxx2_evb.dts57 clock-frequency = <I2C_BITRATE_STANDARD>;
64 clock-frequency = <I2C_BITRATE_STANDARD>;
71 clock-frequency = <I2C_BITRATE_STANDARD>;
78 clock-frequency = <I2C_BITRATE_STANDARD>;
85 clock-frequency = <I2C_BITRATE_STANDARD>;
92 clock-frequency = <I2C_BITRATE_STANDARD>;
100 clock-frequency = <1843200>;
105 clock-frequency = <1843200>;
130 * then we should set frequency <=324Hz.
132 pwm-output-frequency = <324>;
[all …]
/Zephyr-latest/boards/ite/it82xx2_evb/
Dit82xx2_evb.dts60 clock-frequency = <I2C_BITRATE_STANDARD>;
68 clock-frequency = <I2C_BITRATE_STANDARD>;
76 clock-frequency = <I2C_BITRATE_STANDARD>;
84 clock-frequency = <I2C_BITRATE_STANDARD>;
92 clock-frequency = <I2C_BITRATE_STANDARD>;
100 clock-frequency = <I2C_BITRATE_STANDARD>;
109 clock-frequency = <1843200>;
115 clock-frequency = <1843200>;
143 * then we should set frequency <=324Hz.
145 pwm-output-frequency = <324>;
[all …]
/Zephyr-latest/tests/drivers/build_all/display/
Dapp.overlay40 mipi-max-frequency = <25000000>;
50 mipi-max-frequency = <25000000>;
62 mipi-max-frequency = <250000000>;
77 mipi-max-frequency = <25000000>;
104 mipi-max-frequency = <4000000>;
113 mipi-max-frequency = <4000000>;
132 mipi-max-frequency = <100000000>;
142 mipi-max-frequency = <100000000>;
157 mipi-max-frequency = <16000000>;
177 mipi-max-frequency = <25000000>;
[all …]
/Zephyr-latest/samples/drivers/stepper/tmc50xx/boards/
Dnucleo_g071rb.overlay15 spi-max-frequency = <DT_FREQ_M(1)>; /* Maximum SPI bus frequency */
20 clock-frequency = <DT_FREQ_M(10)>; /* Internal/External Clock frequency */
/Zephyr-latest/tests/drivers/spi/dt_spec/
Dapp.overlay28 clock-frequency = <2000000>;
35 spi-max-frequency = <2000000>;
45 clock-frequency = <2000000>;
50 spi-max-frequency = <2000000>;
/Zephyr-latest/boards/amd/kv260_r5/
Dkv260_r5.dts30 clock-frequency = <100000000>;
38 clock-frequency = <99999901>;
43 clock-frequency = <5000000>;
53 clock-frequency = <400000>;

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