Searched refs:a10 (Results 1 – 14 of 14) sorted by relevance
| /Zephyr-latest/arch/xtensa/core/ |
| D | crt1.S | 45 # define ARG5 a10 /* 5th outgoing call argument */
169 sub a10, a9, a8 /* a10 = length, assumed a multiple of 4 */
170 bbci.l a10, 2, .L1zte
173 .L1zte: bbci.l a10, 3, .L2zte
177 .L2zte: srli a10, a10, 4 /* len is now multiple of 16, divide by 16 */
178 floopnez a10, clearzte
184 floopend a10, clearzte
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| D | window_vectors.S | 203 s32e a10, a0, -24 /* save a10 to end of call[j]'s stack frame */
236 l32e a10, a11, -24 /* restore a10 from end of call[i]'s stack
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| D | coredump.c | 75 uint32_t a10; member
169 arch_blk.r.a10 = frame->blks[regs_blk_remaining].r2; in arch_coredump_info_dump()
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| D | thread.c | 115 frame->a10 = 0; /* a10 */ in init_stack()
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| D | xtensa_asm2_util.S | 71 s32i a10, a1, 8
118 l32i a10, a2, 8
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| D | userspace.S | 169 mov a10, a8
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_asm2_context.h | 191 uintptr_t a10; member
212 uintptr_t a10; member
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| D | xtensa_asm2_s.h | 357 mov a10, a1 /* pass "context handle" in 2nd frame's A2 */
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| /Zephyr-latest/soc/intel/intel_adsp/ace/ |
| D | power_down.S | 37 #define temp_reg4 a10
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| /Zephyr-latest/soc/intel/intel_adsp/cavs/ |
| D | power_down_cavs.S | 43 #define host_base a10
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| /Zephyr-latest/arch/xtensa/core/startup/ |
| D | reset_vector.S | 414 addi a10, a9, 1 /* set that new bit if... */
415 moveqz a9, a10, a5 /* ... that region is non-cacheable */
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| /Zephyr-latest/dts/arm/renesas/rz/ |
| D | rzt2m.dtsi | 78 prcrn: prcrn@80281a10 {
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| /Zephyr-latest/dts/xtensa/intel/ |
| D | intel_adsp_cavs25_tgph.dtsi | 124 mem_window2: mem_window@71a10 {
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| D | intel_adsp_cavs25.dtsi | 139 mem_window2: mem_window@71a10 {
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