Searched refs:MASK (Results 1 – 9 of 9) sorted by relevance
| /Zephyr-latest/drivers/dma/ |
| D | dma_dw_common.h | 17 #define MASK(b_hi, b_lo) \ macro
84 #define DW_CHAN_WRITE_EN_ALL MASK(2 * DW_MAX_CHAN - 1, DW_MAX_CHAN)
86 #define DW_CHAN_ALL MASK(DW_MAX_CHAN - 1, 0)
137 #define DW_CTLL_SRC_WIDTH_MASK MASK(6, 4)
139 #define DW_CTLL_DST_WIDTH_MASK MASK(3, 1)
146 #define DW_CTLH_BLOCK_TS_MASK MASK(16, 0)
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| /Zephyr-latest/include/zephyr/drivers/ethernet/ |
| D | eth_nxp_enet_qos.h | 24 #define _ENET_QOS_REG_FIELD(reg, field) MACRO_MAP_CAT(_PREFIX_UNDERLINE, reg, field, MASK)
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| /Zephyr-latest/drivers/dai/intel/ssp/ |
| D | ssp.h | 41 (((x) & MASK(b_hi, b_lo)) >> (b_lo))
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_gicv3_priv.h | 270 #define MASK(__basename) (__basename##_MASK << __basename##_SHIFT) macro
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| D | intc_gicv3_its.c | 86 reg &= ~MASK(GITS_CTLR_ENABLED); in its_force_quiescent()
120 reg &= ~MASK(GITS_BASER_PAGE_SIZE); in its_probe_baser_page_size()
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_mcux_lpc.c | 194 gpio_base->MASK[port] = ~mask; in gpio_mcux_lpc_port_set_masked_raw()
197 gpio_base->MASK[port] = 0U; in gpio_mcux_lpc_port_set_masked_raw()
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| D | gpio_silabs_siwx91x.c | 244 pcfg->reg->INTR[i].GPIO_INTR_CTRL_b.MASK = 1; in gpio_siwx91x_interrupt_configure()
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| /Zephyr-latest/drivers/rtc/ |
| D | rtc_sam0.c | 325 regs->Mode2Alarm[id].MASK.reg = RTC_MODE2_MASK_SEL(alarm_msk); in rtc_sam0_alarm_set_time()
357 alarm_msk = regs->Mode2Alarm[id].MASK.reg; in rtc_sam0_alarm_get_time()
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| /Zephyr-latest/doc/build/kconfig/ |
| D | tips.rst | 917 by the user. For example, a value ``MASK`` that's hardcoded to 0xFF on some
922 config MASK
932 config MASK
938 indicate that ``MASK`` is configurable. When ``MASK`` is configurable, it will
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