| /nrf_hw_models-latest/src/HW_models/ |
| D | NRF_GPIO.c | 155 unsigned int nrf_gpio_get_number_pins_in_port(int port) { in nrf_gpio_get_number_pins_in_port() argument
156 return gpio_st[port].nbr_pins; in nrf_gpio_get_number_pins_in_port()
159 static void nrf_gpio_eval_outputs(unsigned int port);
160 static void nrf_gpio_eval_inputs(unsigned int port);
161 void nrf_gpio_eval_input(unsigned int port, unsigned int n, bool value);
187 void nrf_gpio_test_change_pin_level(unsigned int port, unsigned int n, bool value) { in nrf_gpio_test_change_pin_level() argument
188 nrf_gpio_eval_input(port, n, value); in nrf_gpio_test_change_pin_level()
199 bool nrf_gpio_get_pin_level(unsigned int port, unsigned int n) { in nrf_gpio_get_pin_level() argument
200 return (gpio_st[port].IO_level >> n) & 0x1; in nrf_gpio_get_pin_level()
203 #define CHECK_PIN_EXISTS(port, n, dir) \ argument
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| D | NRF_GPIO.h | 26 typedef void (*nrf_gpio_input_callback_t)(unsigned int port, unsigned int n, bool value);
27 typedef void (*nrf_gpio_input_callback_hw_t)(unsigned int port, unsigned int n, bool value, void *f…
30 unsigned int nrf_gpio_get_number_pins_in_port(int port);
34 void nrf_gpio_test_change_pin_level(unsigned int port, unsigned int n, bool value);
35 bool nrf_gpio_get_pin_level(unsigned int port, unsigned int n);
37 void nrf_gpio_peri_pin_control(unsigned int port, unsigned int n,
40 void nrf_gpio_peri_change_output(unsigned int port, unsigned int n, bool value);
42 bool nrf_gpio_get_detect_level(unsigned int port);
44 void nrf_gpio_regw_sideeffects_OUT(unsigned int port);
45 void nrf_gpio_regw_sideeffects_OUTSET(unsigned int port);
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| D | NRF_GPIO_backend.c | 43 uint8_t port; member
53 unsigned int port; member
128 void nrf_gpio_backend_short_propagate(unsigned int port, unsigned int n, bool value) in nrf_gpio_backend_short_propagate() argument
132 if (shorts[port][n][i].port == UINT8_MAX) { in nrf_gpio_backend_short_propagate()
135 nrf_gpio_eval_input(shorts[port][n][i].port, shorts[port][n][i].pin, value); in nrf_gpio_backend_short_propagate()
157 void nrf_gpio_backend_write_output_change(unsigned int port, unsigned int n, bool value) in nrf_gpio_backend_write_output_change() argument
161 nsi_hws_get_time(), port, n, value); in nrf_gpio_backend_write_output_change()
220 if (shorts[Port_out][Pin_out][i].port == UINT8_MAX) in nrf_gpio_backend_register_short()
249 shorts[Port_out][Pin_out][i].port = Port_in; in nrf_gpio_backend_register_short()
328 unsigned int port; in nrf_gpio_input_process_next_time() local
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| D | NRF_GPIOTE.c | 57 uint8_t port; /* GPIO instance */ member
111 void nrf_gpiote_port_detect_raise(unsigned int te_inst, unsigned int port) { in nrf_gpiote_port_detect_raise() argument
112 (void)port; /* unused */ in nrf_gpiote_port_detect_raise()
138 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_OUT()
148 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_SET()
158 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_CLR()
238 static void nrf_gpiote_input_change_ntf(unsigned int port, unsigned int pin_n, bool value, void *cb… in nrf_gpiote_input_change_ntf() argument
240 (void)port; in nrf_gpiote_input_change_ntf()
350 unsigned int port = (NRF_GPIOTE_regs[inst].CONFIG[ch_n] & GPIOTE_CONFIG_PORT_Msk) in nrf_gpiote_regw_sideeffects_CONFIG() local
355 port += NHW_GPIO_APP_P0; in nrf_gpiote_regw_sideeffects_CONFIG()
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| D | NRF_GPIO_backend.h | 18 void nrf_gpio_backend_short_propagate(unsigned int port, unsigned int n, bool value);
19 void nrf_gpio_backend_write_output_change(unsigned int port, unsigned int n, bool value);
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| D | NRF_GPIOTE.h | 13 void nrf_gpiote_port_detect_raise(unsigned int inst, unsigned int port);
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| /nrf_hw_models-latest/docs/ |
| D | GPIO.md | 44 ### Mapping of real ports to simulated port indexes
51 SW point of view (that is, when configuring an App core GPIOTE channel), the App core port P0 is
52 port "0" just like when configuring it in real HW).
64 This is a comma separated file (.csv), with 4 columns: time,port,pin,level. Where:
66 * Port is the GPIO port number starting from 0 (for a nrf52833: 0 or 1).
67 * Pin is the pin number in that port (for a nrf52833: 0..31 for port 0, and 0..9 for port 1)
73 time(microsecond),port,pin,level
83 Where pin 0 in port 0, is toggled at boot, 200microseconds, 600microseconds, 800microseconds, 1ms
101 Each pair separated by a dot. The first value of each pair being the port number,
102 the second value the pin in that port.
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| /nrf_hw_models-latest/src/nrfx/hal/ |
| D | nrf_gpio.c | 195 unsigned int port = gpio_number_from_ptr(reg); in nrf_gpio_pin_toggle() local
200 nrf_gpio_regw_sideeffects_OUTSET(port); in nrf_gpio_pin_toggle()
202 nrf_gpio_regw_sideeffects_OUTCLR(port); in nrf_gpio_pin_toggle()
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