Lines Matching refs:port
155 unsigned int nrf_gpio_get_number_pins_in_port(int port) { in nrf_gpio_get_number_pins_in_port() argument
156 return gpio_st[port].nbr_pins; in nrf_gpio_get_number_pins_in_port()
159 static void nrf_gpio_eval_outputs(unsigned int port);
160 static void nrf_gpio_eval_inputs(unsigned int port);
161 void nrf_gpio_eval_input(unsigned int port, unsigned int n, bool value);
187 void nrf_gpio_test_change_pin_level(unsigned int port, unsigned int n, bool value) { in nrf_gpio_test_change_pin_level() argument
188 nrf_gpio_eval_input(port, n, value); in nrf_gpio_test_change_pin_level()
199 bool nrf_gpio_get_pin_level(unsigned int port, unsigned int n) { in nrf_gpio_get_pin_level() argument
200 return (gpio_st[port].IO_level >> n) & 0x1; in nrf_gpio_get_pin_level()
203 #define CHECK_PIN_EXISTS(port, n, dir) \ argument
204 if (port >= NHW_GPIO_TOTAL_INST || (uint)n >= (uint)gpio_st[port].nbr_pins) { \
207 __func__, port, n); \
210 static inline uint32_t get_enabled_inputs(unsigned int port){ in get_enabled_inputs() argument
211 struct gpio_status *st = &gpio_st[port]; in get_enabled_inputs()
216 static inline uint32_t get_dir(unsigned int port){ in get_dir() argument
217 struct gpio_status *st = &gpio_st[port]; in get_dir()
218 return (~st->dir_override & NRF_GPIO_regs[port].DIR) in get_dir()
250 void nrf_gpio_peri_pin_control(unsigned int port, unsigned int n, in nrf_gpio_peri_pin_control() argument
254 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_peri_pin_control()
256 if (port >= NHW_GPIO_TOTAL_INST || (int)n >= st->nbr_pins) { /* LCOV_EXCL_BR_LINE */ in nrf_gpio_peri_pin_control()
296 nrf_gpio_eval_outputs(port); in nrf_gpio_peri_pin_control()
299 nrf_gpio_eval_inputs(port); in nrf_gpio_peri_pin_control()
312 void nrf_gpio_peri_change_output(unsigned int port, unsigned int n, bool value) in nrf_gpio_peri_change_output() argument
314 CHECK_PIN_EXISTS(port, n, "output"); /* LCOV_EXCL_BR_LINE */ in nrf_gpio_peri_change_output()
316 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_peri_change_output()
321 __func__, port, n); in nrf_gpio_peri_change_output()
324 if (((get_dir(port) >> n) & 0x1) != 1) { in nrf_gpio_peri_change_output()
328 __func__, port, n); in nrf_gpio_peri_change_output()
333 nrf_gpio_eval_outputs(port); in nrf_gpio_peri_change_output()
336 static void nrf_gpio_update_detect_signal(unsigned int port) { in nrf_gpio_update_detect_signal() argument
337 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_update_detect_signal()
339 if (NRF_GPIO_regs[port].DETECTMODE == 0){ //gpio.detect signal from not latched detect in nrf_gpio_update_detect_signal()
346 if (NRF_GPIO_regs[port].DETECTMODE_SEC == 0){ in nrf_gpio_update_detect_signal()
357 static void nrf_gpio_eval_sense(unsigned int port){ in nrf_gpio_eval_sense() argument
358 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_eval_sense()
365 st->DETECT = (NRF_GPIO_regs[port].IN ^ st->SENSE_inv) & st->SENSE_mask; in nrf_gpio_eval_sense()
367 NRF_GPIO_regs[port].LATCH = st->LDETECT; in nrf_gpio_eval_sense()
373 nrf_gpio_update_detect_signal(port); in nrf_gpio_eval_sense()
376 nrf_gpiote_port_detect_raise(st->partner_GPIOTE, port); in nrf_gpio_eval_sense()
380 if ((port == NHW_GPIO_APP_P0) || (port == NHW_GPIO_APP_P1)) { in nrf_gpio_eval_sense()
382 nrf_gpiote_port_detect_raise(NHW_GPIOTE_APP0, port); in nrf_gpio_eval_sense()
393 bool nrf_gpio_get_detect_level(unsigned int port){ in nrf_gpio_get_detect_level() argument
394 return gpio_st[port].DETECT_signal; in nrf_gpio_get_detect_level()
400 bool nrf_gpio_get_IN(unsigned int port, unsigned int n) { in nrf_gpio_get_IN() argument
401 return (NRF_GPIO_regs[port].IN >> n) & 0x1; in nrf_gpio_get_IN()
408 static void nrf_gpio_input_change_sideeffects(unsigned int port, unsigned int n) in nrf_gpio_input_change_sideeffects() argument
410 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_input_change_sideeffects()
411 bool level = nrf_gpio_get_IN(port,n); in nrf_gpio_input_change_sideeffects()
414 st->per_intoggle_callbacks[n](port, n, level, st->per_intoggle_cb_data[n]); in nrf_gpio_input_change_sideeffects()
417 test_intoggle_callback(port, n, level); in nrf_gpio_input_change_sideeffects()
425 static void nrf_gpio_eval_inputs(unsigned int port) in nrf_gpio_eval_inputs() argument
427 uint32_t new_IN = gpio_st[port].IO_level & get_enabled_inputs(port); in nrf_gpio_eval_inputs()
429 uint32_t diff = new_IN ^ NRF_GPIO_regs[port].IN; in nrf_gpio_eval_inputs()
431 NRF_GPIO_regs[port].IN = new_IN; in nrf_gpio_eval_inputs()
434 nrf_gpio_input_change_sideeffects(port, n); in nrf_gpio_eval_inputs()
438 nrf_gpio_eval_sense(port); in nrf_gpio_eval_inputs()
453 void nrf_gpio_eval_input(unsigned int port, unsigned int n, bool value) in nrf_gpio_eval_input() argument
455 CHECK_PIN_EXISTS(port, n, "input"); /* LCOV_EXCL_BR_LINE */ in nrf_gpio_eval_input()
457 uint32_t dir = get_dir(port); in nrf_gpio_eval_input()
463 __func__, port, n); in nrf_gpio_eval_input()
467 int diff = ((gpio_st[port].IO_level >> n) & 0x1) ^ (uint32_t)value; in nrf_gpio_eval_input()
474 gpio_st[port].IO_level ^= (uint32_t)1 << n; in nrf_gpio_eval_input()
476 nrf_gpio_eval_inputs(port); in nrf_gpio_eval_input()
482 static void nrf_gpio_output_change_sideeffects(unsigned int port,unsigned int n, bool value) in nrf_gpio_output_change_sideeffects() argument
484 nrf_gpio_backend_write_output_change(port, n, value); in nrf_gpio_output_change_sideeffects()
486 test_outtoggle_callback(port, n, value); in nrf_gpio_output_change_sideeffects()
488 nrf_gpio_backend_short_propagate(port, n, value); in nrf_gpio_output_change_sideeffects()
494 static void nrf_gpio_eval_outputs(unsigned int port) in nrf_gpio_eval_outputs() argument
497 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_eval_outputs()
499 uint32_t dir = get_dir(port); /* Which pins are driven by output */ in nrf_gpio_eval_outputs()
501 uint32_t out = (~st->out_override & NRF_GPIO_regs[port].OUT) in nrf_gpio_eval_outputs()
518 nrf_gpio_output_change_sideeffects(port, n, (new_output >> n) & 0x1); in nrf_gpio_eval_outputs()
523 nrf_gpio_eval_inputs(port); in nrf_gpio_eval_outputs()
531 void nrf_gpio_regw_sideeffects_OUT(unsigned int port) { in nrf_gpio_regw_sideeffects_OUT() argument
532 nrf_gpio_eval_outputs(port); in nrf_gpio_regw_sideeffects_OUT()
535 void nrf_gpio_regw_sideeffects_OUTSET(unsigned int port) { in nrf_gpio_regw_sideeffects_OUTSET() argument
536 if (NRF_GPIO_regs[port].OUTSET) { in nrf_gpio_regw_sideeffects_OUTSET()
537 NRF_GPIO_regs[port].OUT |= NRF_GPIO_regs[port].OUTSET; in nrf_gpio_regw_sideeffects_OUTSET()
538 nrf_gpio_eval_outputs(port); in nrf_gpio_regw_sideeffects_OUTSET()
540 NRF_GPIO_regs[port].OUTSET = NRF_GPIO_regs[port].OUT; in nrf_gpio_regw_sideeffects_OUTSET()
543 void nrf_gpio_regw_sideeffects_OUTCLR(unsigned int port) { in nrf_gpio_regw_sideeffects_OUTCLR() argument
544 if (NRF_GPIO_regs[port].OUTCLR) { in nrf_gpio_regw_sideeffects_OUTCLR()
545 NRF_GPIO_regs[port].OUT &= ~NRF_GPIO_regs[port].OUTCLR; in nrf_gpio_regw_sideeffects_OUTCLR()
546 NRF_GPIO_regs[port].OUTCLR = 0; in nrf_gpio_regw_sideeffects_OUTCLR()
547 nrf_gpio_eval_outputs(port); in nrf_gpio_regw_sideeffects_OUTCLR()
551 void nrf_gpio_regw_sideeffects_DIR(unsigned int port) { in nrf_gpio_regw_sideeffects_DIR() argument
553 for (int n = 0; n < gpio_st[port].nbr_pins; n++ ) { in nrf_gpio_regw_sideeffects_DIR()
554 NRF_GPIO_regs[port].PIN_CNF[n] &= ~GPIO_PIN_CNF_DIR_Msk; in nrf_gpio_regw_sideeffects_DIR()
555 NRF_GPIO_regs[port].PIN_CNF[n] |= (NRF_GPIO_regs[port].DIR >> n) & 0x1; in nrf_gpio_regw_sideeffects_DIR()
558 nrf_gpio_eval_outputs(port); in nrf_gpio_regw_sideeffects_DIR()
561 void nrf_gpio_regw_sideeffects_DIRSET(unsigned int port) { in nrf_gpio_regw_sideeffects_DIRSET() argument
562 if (NRF_GPIO_regs[port].DIRSET) { in nrf_gpio_regw_sideeffects_DIRSET()
563 NRF_GPIO_regs[port].DIR |= NRF_GPIO_regs[port].DIRSET; in nrf_gpio_regw_sideeffects_DIRSET()
564 nrf_gpio_regw_sideeffects_DIR(port); in nrf_gpio_regw_sideeffects_DIRSET()
566 NRF_GPIO_regs[port].DIRSET = NRF_GPIO_regs[port].DIR; in nrf_gpio_regw_sideeffects_DIRSET()
569 void nrf_gpio_regw_sideeffects_DIRCLR(unsigned int port) { in nrf_gpio_regw_sideeffects_DIRCLR() argument
570 if (NRF_GPIO_regs[port].DIRCLR) { in nrf_gpio_regw_sideeffects_DIRCLR()
571 NRF_GPIO_regs[port].DIR &= ~NRF_GPIO_regs[port].DIRCLR; in nrf_gpio_regw_sideeffects_DIRCLR()
572 NRF_GPIO_regs[port].DIRCLR = 0; in nrf_gpio_regw_sideeffects_DIRCLR()
573 nrf_gpio_regw_sideeffects_DIR(port); in nrf_gpio_regw_sideeffects_DIRCLR()
577 void nrf_gpio_regw_sideeffects_LATCH(unsigned int port) { in nrf_gpio_regw_sideeffects_LATCH() argument
578 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_regw_sideeffects_LATCH()
585 uint32_t sw_input = NRF_GPIO_regs[port].LATCH; in nrf_gpio_regw_sideeffects_LATCH()
593 NRF_GPIO_regs[port].LATCH = st->LDETECT; in nrf_gpio_regw_sideeffects_LATCH()
595 nrf_gpio_update_detect_signal(port); in nrf_gpio_regw_sideeffects_LATCH()
604 …if (sw_input != 0 && st->LDETECT != 0 && NRF_GPIO_regs[port].DETECTMODE == 1 && (st->partner_GPIOT… in nrf_gpio_regw_sideeffects_LATCH()
605 nrf_gpiote_port_detect_raise(st->partner_GPIOTE, port); in nrf_gpio_regw_sideeffects_LATCH()
609 if ((port == NHW_GPIO_APP_P0) || (port == NHW_GPIO_APP_P1)) { in nrf_gpio_regw_sideeffects_LATCH()
610 if ((sw_input != 0) && (st->LDETECT != 0) && (NRF_GPIO_regs[port].DETECTMODE_SEC == 1)) { in nrf_gpio_regw_sideeffects_LATCH()
611 nrf_gpiote_port_detect_raise(NHW_GPIOTE_APP0, port); in nrf_gpio_regw_sideeffects_LATCH()
618 void nrf_gpio_regw_sideeffects_DETECTMODE(unsigned int port) { in nrf_gpio_regw_sideeffects_DETECTMODE() argument
619 nrf_gpio_eval_sense(port); in nrf_gpio_regw_sideeffects_DETECTMODE()
622 void nrf_gpio_regw_sideeffects_PIN_CNF(unsigned int port, unsigned int n) { in nrf_gpio_regw_sideeffects_PIN_CNF() argument
624 struct gpio_status *st = &gpio_st[port]; in nrf_gpio_regw_sideeffects_PIN_CNF()
630 uint dir = NRF_GPIO_regs[port].PIN_CNF[n] & GPIO_PIN_CNF_DIR_Msk; in nrf_gpio_regw_sideeffects_PIN_CNF()
632 if (dir != ((NRF_GPIO_regs[port].DIR >> n) & 0x1)) { in nrf_gpio_regw_sideeffects_PIN_CNF()
633 NRF_GPIO_regs[port].DIR ^= 1 << n; in nrf_gpio_regw_sideeffects_PIN_CNF()
645 uint input = (NRF_GPIO_regs[port].PIN_CNF[n] & GPIO_PIN_CNF_INPUT_Msk) in nrf_gpio_regw_sideeffects_PIN_CNF()
652 int sense = (NRF_GPIO_regs[port].PIN_CNF[n] & GPIO_PIN_CNF_SENSE_Msk) in nrf_gpio_regw_sideeffects_PIN_CNF()
664 nrf_gpio_eval_outputs(port); in nrf_gpio_regw_sideeffects_PIN_CNF()
667 nrf_gpio_eval_inputs(port); in nrf_gpio_regw_sideeffects_PIN_CNF()
670 nrf_gpio_eval_sense(port); in nrf_gpio_regw_sideeffects_PIN_CNF()