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Searched refs:WP (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/soc/espressif/common/
DKconfig.spiram203 bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
210 …When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
212 mode, so a WP pin setting is necessary.
214 If this config item is set to N (default), the correct WP pin will be automatically used for any
216 to Y and specify the GPIO number connected to the WP pin.
218 …When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP p…
222 int "Custom SPI PSRAM WP(SD3) Pin"
227 The option "Use custom SPI PSRAM WP(SD3) pin" must be set or this value is ignored
230 value to the GPIO number of the SPIRAM WP pin.
/Zephyr-latest/boards/renesas/rcar_h3ulcb/
Drcar_h3ulcb_r8a77951_a57-pinctrl.dtsi84 /* note: WP pin is fixed at 3.3V */
/Zephyr-latest/cmake/sca/eclair/
Dsca.cmake53 set(ECLAIR_RULESET WP)
/Zephyr-latest/doc/develop/sca/
Declair.rst73 * WP: All whole program project coding guidelines ("system" in MISRA's parlance).
/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst2400 * :github:`46285` - nrf_qspi_nor: Inconsistent state of HOLD and WP for QSPI command execution caus…
/Zephyr-latest/samples/modules/tflite-micro/hello_world/train/
Dtrain_hello_world_model.ipynb2874 …Pap1S/s3v7e5zp33sLk+hAYrfBReQmEdkGzBORb4nI8yLyuYj8y398eNw5xSJypf94jIi8JiLT/WP/ISIjGnlsLxFZKSI7RWSp…