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Searched refs:F0 (Results 1 – 17 of 17) sorted by relevance

/Zephyr-latest/boards/shields/lcd_par_s035/
Dlcd_par_s035_8080.overlay54 pgc = [F0 06 0B 07 06 05 2E 33 47 3A 17 16 2E 31];
55 ngc = [F0 09 0D 09 08 23 2E 33 46 38 13 13 2C 32];
/Zephyr-latest/boards/nxp/rd_rw612_bga/dts/
Dgoworld_16880_lcm.overlay62 pgc = [F0 06 0B 07 06 05 2E 33 47 3A 17 16 2E 31];
63 ngc = [F0 09 0D 09 08 23 2E 33 46 38 13 13 2C 32];
/Zephyr-latest/boards/shields/st7789v_generic/
Dst7789v_waveshare_240x240.overlay45 ram-param = [00 F0];
/Zephyr-latest/drivers/counter/
DKconfig.stm32_rtc16 Tested on STM32 C0, F0, F2, F3, F4, F7, G0, G4, H7, L1, L4, L5, U5 series
/Zephyr-latest/tests/drivers/build_all/display/
Dapp.overlay56 pgc = [F0 06 0B 07 06 05 2E 33 47 3A 17 16 2E 31];
57 ngc = [F0 09 0D 09 08 23 2E 33 46 38 13 13 2C 32];
/Zephyr-latest/boards/fanke/fk750m1_vbt6/
Dfk750m1_vbt6.dts66 ram-param = [00 F0];
/Zephyr-latest/boards/espressif/esp32s3_eye/
Desp32s3_eye_procpu.dts110 ram-param = [00 F0];
/Zephyr-latest/boards/m5stack/m5stickc_plus/
Dm5stickc_plus_procpu.dts97 ram-param = [00 F0];
/Zephyr-latest/samples/tfm_integration/psa_crypto/
DREADME.rst284 000000F0 88 26 F4 FF 97 FB 96 C4 E6 FB C4 99 3E 46 19 FC .&..........>F..
300 000001F0 B0 95 B5 E5 CB 79 92 F8 F1 A0 FE 14 0C 6C 84 2A .....y.......l.*
351 000000A0 D7 BF 50 60 6C 65 8A 7C A6 CD C5 98 8B 15 EA F0 ..P`le.|........
356 000000F0 DE 8D BE C2 8B 31 B8 ED 06 AE A9 0B 7E 62 75 87 .....1......~bu.
/Zephyr-latest/boards/pine64/pinetime_devkit0/
Dpinetime_devkit0.dts113 ram-param = [00 F0];
/Zephyr-latest/boards/adafruit/feather_esp32s3_tft/
Dadafruit_feather_esp32s3_tft_procpu.dts120 ram-param = [00 F0];
/Zephyr-latest/arch/sparc/core/
Dtrap_table_mvt.S196 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F0 - F3
/Zephyr-latest/boards/st/stm32l562e_dk/
Dstm32l562e_dk_common.dtsi115 ram-param = [00 F0];
/Zephyr-latest/doc/releases/
Drelease-notes-1.10.rst63 * STM F0
418 * :github:`4429` - I2C: stm32-i2c-v2 Driver (F0/F3/F7) gets stuck in endless loop when handling res…
Drelease-notes-2.4.rst371 configuration option additions for H7 series, and fixes on F0/F3 PREDIV1
381 * STM32: Added support on F0/F2 series.
390 * STM32: Added support for F0/F2/G4/L1 series.
445 * STM32: Factorized support for F0/F1/F3. Added L0 support. Various fixes.
Drelease-notes-1.11.rst350 * :github:`5391` - drivers: stm32 clock control: F0 Series with PREDIV1 Support uses wrong PLLSOURC…
Drelease-notes-2.5.rst347 (SRAM > 64K ), excluding F0/G0/L0 series.