Searched refs:TCC_INTENSET_MC0 (Results 1 – 2 of 2) sorted by relevance
942 #define TCC_INTENSET_MC0 (1 << TCC_INTENSET_MC0_Pos) macro
2876 ((Tcc *)hw)->INTENSET.reg = TCC_INTENSET_MC0; in hri_tcc_set_INTEN_MC0_bit()2881 return (((Tcc *)hw)->INTENSET.reg & TCC_INTENSET_MC0) >> TCC_INTENSET_MC0_Pos; in hri_tcc_get_INTEN_MC0_bit()2887 ((Tcc *)hw)->INTENCLR.reg = TCC_INTENSET_MC0; in hri_tcc_write_INTEN_MC0_bit()2889 ((Tcc *)hw)->INTENSET.reg = TCC_INTENSET_MC0; in hri_tcc_write_INTEN_MC0_bit()2895 ((Tcc *)hw)->INTENCLR.reg = TCC_INTENSET_MC0; in hri_tcc_clear_INTEN_MC0_bit()
