/loramac-node-latest/src/boards/mcu/saml21/hri/ |
D | hri_evsys_l21.h | 677 return (((Evsys *)hw)->INTFLAG.reg & EVSYS_INTFLAG_OVR0) >> EVSYS_INTFLAG_OVR0_Pos; in hri_evsys_get_INTFLAG_OVR0_bit() 682 ((Evsys *)hw)->INTFLAG.reg = EVSYS_INTFLAG_OVR0; in hri_evsys_clear_INTFLAG_OVR0_bit() 687 return (((Evsys *)hw)->INTFLAG.reg & EVSYS_INTFLAG_OVR1) >> EVSYS_INTFLAG_OVR1_Pos; in hri_evsys_get_INTFLAG_OVR1_bit() 692 ((Evsys *)hw)->INTFLAG.reg = EVSYS_INTFLAG_OVR1; in hri_evsys_clear_INTFLAG_OVR1_bit() 697 return (((Evsys *)hw)->INTFLAG.reg & EVSYS_INTFLAG_OVR2) >> EVSYS_INTFLAG_OVR2_Pos; in hri_evsys_get_INTFLAG_OVR2_bit() 702 ((Evsys *)hw)->INTFLAG.reg = EVSYS_INTFLAG_OVR2; in hri_evsys_clear_INTFLAG_OVR2_bit() 707 return (((Evsys *)hw)->INTFLAG.reg & EVSYS_INTFLAG_OVR3) >> EVSYS_INTFLAG_OVR3_Pos; in hri_evsys_get_INTFLAG_OVR3_bit() 712 ((Evsys *)hw)->INTFLAG.reg = EVSYS_INTFLAG_OVR3; in hri_evsys_clear_INTFLAG_OVR3_bit() 717 return (((Evsys *)hw)->INTFLAG.reg & EVSYS_INTFLAG_OVR4) >> EVSYS_INTFLAG_OVR4_Pos; in hri_evsys_get_INTFLAG_OVR4_bit() 722 ((Evsys *)hw)->INTFLAG.reg = EVSYS_INTFLAG_OVR4; in hri_evsys_clear_INTFLAG_OVR4_bit() [all …]
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D | hri_rtc_l21.h | 1328 return (((Rtc *)hw)->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_PER0) >> RTC_MODE2_INTFLAG_PER0_Pos; in hri_rtcmode2_get_INTFLAG_PER0_bit() 1333 ((Rtc *)hw)->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_PER0; in hri_rtcmode2_clear_INTFLAG_PER0_bit() 1338 return (((Rtc *)hw)->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_PER1) >> RTC_MODE2_INTFLAG_PER1_Pos; in hri_rtcmode2_get_INTFLAG_PER1_bit() 1343 ((Rtc *)hw)->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_PER1; in hri_rtcmode2_clear_INTFLAG_PER1_bit() 1348 return (((Rtc *)hw)->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_PER2) >> RTC_MODE2_INTFLAG_PER2_Pos; in hri_rtcmode2_get_INTFLAG_PER2_bit() 1353 ((Rtc *)hw)->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_PER2; in hri_rtcmode2_clear_INTFLAG_PER2_bit() 1358 return (((Rtc *)hw)->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_PER3) >> RTC_MODE2_INTFLAG_PER3_Pos; in hri_rtcmode2_get_INTFLAG_PER3_bit() 1363 ((Rtc *)hw)->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_PER3; in hri_rtcmode2_clear_INTFLAG_PER3_bit() 1368 return (((Rtc *)hw)->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_PER4) >> RTC_MODE2_INTFLAG_PER4_Pos; in hri_rtcmode2_get_INTFLAG_PER4_bit() 1373 ((Rtc *)hw)->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_PER4; in hri_rtcmode2_clear_INTFLAG_PER4_bit() [all …]
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D | hri_oscctrl_l21.h | 374 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_XOSCRDY) >> OSCCTRL_INTFLAG_XOSCRDY_Pos; in hri_oscctrl_get_INTFLAG_XOSCRDY_bit() 379 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_XOSCRDY; in hri_oscctrl_clear_INTFLAG_XOSCRDY_bit() 384 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_OSC16MRDY) >> OSCCTRL_INTFLAG_OSC16MRDY_Pos; in hri_oscctrl_get_INTFLAG_OSC16MRDY_bit() 389 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_OSC16MRDY; in hri_oscctrl_clear_INTFLAG_OSC16MRDY_bit() 394 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLRDY) >> OSCCTRL_INTFLAG_DFLLRDY_Pos; in hri_oscctrl_get_INTFLAG_DFLLRDY_bit() 399 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLRDY; in hri_oscctrl_clear_INTFLAG_DFLLRDY_bit() 404 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLOOB) >> OSCCTRL_INTFLAG_DFLLOOB_Pos; in hri_oscctrl_get_INTFLAG_DFLLOOB_bit() 409 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLOOB; in hri_oscctrl_clear_INTFLAG_DFLLOOB_bit() 414 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLLCKF) >> OSCCTRL_INTFLAG_DFLLLCKF_Pos; in hri_oscctrl_get_INTFLAG_DFLLLCKF_bit() 419 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLLCKF; in hri_oscctrl_clear_INTFLAG_DFLLLCKF_bit() [all …]
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D | hri_supc_l21.h | 320 return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD33RDY) >> SUPC_INTFLAG_BOD33RDY_Pos; in hri_supc_get_INTFLAG_BOD33RDY_bit() 325 ((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD33RDY; in hri_supc_clear_INTFLAG_BOD33RDY_bit() 330 return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD33DET) >> SUPC_INTFLAG_BOD33DET_Pos; in hri_supc_get_INTFLAG_BOD33DET_bit() 335 ((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD33DET; in hri_supc_clear_INTFLAG_BOD33DET_bit() 340 return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_B33SRDY) >> SUPC_INTFLAG_B33SRDY_Pos; in hri_supc_get_INTFLAG_B33SRDY_bit() 345 ((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_B33SRDY; in hri_supc_clear_INTFLAG_B33SRDY_bit() 350 return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12RDY) >> SUPC_INTFLAG_BOD12RDY_Pos; in hri_supc_get_INTFLAG_BOD12RDY_bit() 355 ((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12RDY; in hri_supc_clear_INTFLAG_BOD12RDY_bit() 360 return (((Supc *)hw)->INTFLAG.reg & SUPC_INTFLAG_BOD12DET) >> SUPC_INTFLAG_BOD12DET_Pos; in hri_supc_get_INTFLAG_BOD12DET_bit() 365 ((Supc *)hw)->INTFLAG.reg = SUPC_INTFLAG_BOD12DET; in hri_supc_clear_INTFLAG_BOD12DET_bit() [all …]
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D | hri_trng_l21.h | 123 return (((Trng *)hw)->INTFLAG.reg & TRNG_INTFLAG_DATARDY) >> TRNG_INTFLAG_DATARDY_Pos; in hri_trng_get_INTFLAG_DATARDY_bit() 128 ((Trng *)hw)->INTFLAG.reg = TRNG_INTFLAG_DATARDY; in hri_trng_clear_INTFLAG_DATARDY_bit() 133 return (((Trng *)hw)->INTFLAG.reg & TRNG_INTFLAG_DATARDY) >> TRNG_INTFLAG_DATARDY_Pos; in hri_trng_get_interrupt_DATARDY_bit() 138 ((Trng *)hw)->INTFLAG.reg = TRNG_INTFLAG_DATARDY; in hri_trng_clear_interrupt_DATARDY_bit() 144 tmp = ((Trng *)hw)->INTFLAG.reg; in hri_trng_get_INTFLAG_reg() 151 return ((Trng *)hw)->INTFLAG.reg; in hri_trng_read_INTFLAG_reg() 156 ((Trng *)hw)->INTFLAG.reg = mask; in hri_trng_clear_INTFLAG_reg()
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D | hri_dac_l21.h | 212 return (((Dac *)hw)->INTFLAG.reg & DAC_INTFLAG_UNDERRUN0) >> DAC_INTFLAG_UNDERRUN0_Pos; in hri_dac_get_INTFLAG_UNDERRUN0_bit() 217 ((Dac *)hw)->INTFLAG.reg = DAC_INTFLAG_UNDERRUN0; in hri_dac_clear_INTFLAG_UNDERRUN0_bit() 222 return (((Dac *)hw)->INTFLAG.reg & DAC_INTFLAG_UNDERRUN1) >> DAC_INTFLAG_UNDERRUN1_Pos; in hri_dac_get_INTFLAG_UNDERRUN1_bit() 227 ((Dac *)hw)->INTFLAG.reg = DAC_INTFLAG_UNDERRUN1; in hri_dac_clear_INTFLAG_UNDERRUN1_bit() 232 return (((Dac *)hw)->INTFLAG.reg & DAC_INTFLAG_EMPTY0) >> DAC_INTFLAG_EMPTY0_Pos; in hri_dac_get_INTFLAG_EMPTY0_bit() 237 ((Dac *)hw)->INTFLAG.reg = DAC_INTFLAG_EMPTY0; in hri_dac_clear_INTFLAG_EMPTY0_bit() 242 return (((Dac *)hw)->INTFLAG.reg & DAC_INTFLAG_EMPTY1) >> DAC_INTFLAG_EMPTY1_Pos; in hri_dac_get_INTFLAG_EMPTY1_bit() 247 ((Dac *)hw)->INTFLAG.reg = DAC_INTFLAG_EMPTY1; in hri_dac_clear_INTFLAG_EMPTY1_bit() 252 return (((Dac *)hw)->INTFLAG.reg & DAC_INTFLAG_UNDERRUN0) >> DAC_INTFLAG_UNDERRUN0_Pos; in hri_dac_get_interrupt_UNDERRUN0_bit() 257 ((Dac *)hw)->INTFLAG.reg = DAC_INTFLAG_UNDERRUN0; in hri_dac_clear_interrupt_UNDERRUN0_bit() [all …]
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D | hri_sercom_l21.h | 297 return (((Sercom *)hw)->SPI.INTFLAG.reg & SERCOM_SPI_INTFLAG_DRE) >> SERCOM_SPI_INTFLAG_DRE_Pos; in hri_sercomspi_get_INTFLAG_DRE_bit() 302 ((Sercom *)hw)->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_DRE; in hri_sercomspi_clear_INTFLAG_DRE_bit() 307 return (((Sercom *)hw)->SPI.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) >> SERCOM_SPI_INTFLAG_TXC_Pos; in hri_sercomspi_get_INTFLAG_TXC_bit() 312 ((Sercom *)hw)->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC; in hri_sercomspi_clear_INTFLAG_TXC_bit() 317 return (((Sercom *)hw)->SPI.INTFLAG.reg & SERCOM_SPI_INTFLAG_RXC) >> SERCOM_SPI_INTFLAG_RXC_Pos; in hri_sercomspi_get_INTFLAG_RXC_bit() 322 ((Sercom *)hw)->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_RXC; in hri_sercomspi_clear_INTFLAG_RXC_bit() 327 return (((Sercom *)hw)->SPI.INTFLAG.reg & SERCOM_SPI_INTFLAG_SSL) >> SERCOM_SPI_INTFLAG_SSL_Pos; in hri_sercomspi_get_INTFLAG_SSL_bit() 332 ((Sercom *)hw)->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_SSL; in hri_sercomspi_clear_INTFLAG_SSL_bit() 337 …return (((Sercom *)hw)->SPI.INTFLAG.reg & SERCOM_SPI_INTFLAG_ERROR) >> SERCOM_SPI_INTFLAG_ERROR_Po… in hri_sercomspi_get_INTFLAG_ERROR_bit() 342 ((Sercom *)hw)->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_ERROR; in hri_sercomspi_clear_INTFLAG_ERROR_bit() [all …]
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D | hri_wdt_l21.h | 136 return (((Wdt *)hw)->INTFLAG.reg & WDT_INTFLAG_EW) >> WDT_INTFLAG_EW_Pos; in hri_wdt_get_INTFLAG_EW_bit() 141 ((Wdt *)hw)->INTFLAG.reg = WDT_INTFLAG_EW; in hri_wdt_clear_INTFLAG_EW_bit() 146 return (((Wdt *)hw)->INTFLAG.reg & WDT_INTFLAG_EW) >> WDT_INTFLAG_EW_Pos; in hri_wdt_get_interrupt_EW_bit() 151 ((Wdt *)hw)->INTFLAG.reg = WDT_INTFLAG_EW; in hri_wdt_clear_interrupt_EW_bit() 157 tmp = ((Wdt *)hw)->INTFLAG.reg; in hri_wdt_get_INTFLAG_reg() 164 return ((Wdt *)hw)->INTFLAG.reg; in hri_wdt_read_INTFLAG_reg() 169 ((Wdt *)hw)->INTFLAG.reg = mask; in hri_wdt_clear_INTFLAG_reg()
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D | hri_nvmctrl_l21.h | 151 return (((Nvmctrl *)hw)->INTFLAG.reg & NVMCTRL_INTFLAG_READY) >> NVMCTRL_INTFLAG_READY_Pos; in hri_nvmctrl_get_INTFLAG_READY_bit() 156 ((Nvmctrl *)hw)->INTFLAG.reg = NVMCTRL_INTFLAG_READY; in hri_nvmctrl_clear_INTFLAG_READY_bit() 161 return (((Nvmctrl *)hw)->INTFLAG.reg & NVMCTRL_INTFLAG_ERROR) >> NVMCTRL_INTFLAG_ERROR_Pos; in hri_nvmctrl_get_INTFLAG_ERROR_bit() 166 ((Nvmctrl *)hw)->INTFLAG.reg = NVMCTRL_INTFLAG_ERROR; in hri_nvmctrl_clear_INTFLAG_ERROR_bit() 171 return (((Nvmctrl *)hw)->INTFLAG.reg & NVMCTRL_INTFLAG_READY) >> NVMCTRL_INTFLAG_READY_Pos; in hri_nvmctrl_get_interrupt_READY_bit() 176 ((Nvmctrl *)hw)->INTFLAG.reg = NVMCTRL_INTFLAG_READY; in hri_nvmctrl_clear_interrupt_READY_bit() 181 return (((Nvmctrl *)hw)->INTFLAG.reg & NVMCTRL_INTFLAG_ERROR) >> NVMCTRL_INTFLAG_ERROR_Pos; in hri_nvmctrl_get_interrupt_ERROR_bit() 186 ((Nvmctrl *)hw)->INTFLAG.reg = NVMCTRL_INTFLAG_ERROR; in hri_nvmctrl_clear_interrupt_ERROR_bit() 193 tmp = ((Nvmctrl *)hw)->INTFLAG.reg; in hri_nvmctrl_get_INTFLAG_reg() 200 return ((Nvmctrl *)hw)->INTFLAG.reg; in hri_nvmctrl_read_INTFLAG_reg() [all …]
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D | hri_osc32kctrl_l21.h | 150 …return (((Osc32kctrl *)hw)->INTFLAG.reg & OSC32KCTRL_INTFLAG_XOSC32KRDY) >> OSC32KCTRL_INTFLAG_XOS… in hri_osc32kctrl_get_INTFLAG_XOSC32KRDY_bit() 155 ((Osc32kctrl *)hw)->INTFLAG.reg = OSC32KCTRL_INTFLAG_XOSC32KRDY; in hri_osc32kctrl_clear_INTFLAG_XOSC32KRDY_bit() 160 …return (((Osc32kctrl *)hw)->INTFLAG.reg & OSC32KCTRL_INTFLAG_OSC32KRDY) >> OSC32KCTRL_INTFLAG_OSC3… in hri_osc32kctrl_get_INTFLAG_OSC32KRDY_bit() 165 ((Osc32kctrl *)hw)->INTFLAG.reg = OSC32KCTRL_INTFLAG_OSC32KRDY; in hri_osc32kctrl_clear_INTFLAG_OSC32KRDY_bit() 170 …return (((Osc32kctrl *)hw)->INTFLAG.reg & OSC32KCTRL_INTFLAG_XOSC32KRDY) >> OSC32KCTRL_INTFLAG_XOS… in hri_osc32kctrl_get_interrupt_XOSC32KRDY_bit() 175 ((Osc32kctrl *)hw)->INTFLAG.reg = OSC32KCTRL_INTFLAG_XOSC32KRDY; in hri_osc32kctrl_clear_interrupt_XOSC32KRDY_bit() 180 …return (((Osc32kctrl *)hw)->INTFLAG.reg & OSC32KCTRL_INTFLAG_OSC32KRDY) >> OSC32KCTRL_INTFLAG_OSC3… in hri_osc32kctrl_get_interrupt_OSC32KRDY_bit() 185 ((Osc32kctrl *)hw)->INTFLAG.reg = OSC32KCTRL_INTFLAG_OSC32KRDY; in hri_osc32kctrl_clear_interrupt_OSC32KRDY_bit() 192 tmp = ((Osc32kctrl *)hw)->INTFLAG.reg; in hri_osc32kctrl_get_INTFLAG_reg() 199 return ((Osc32kctrl *)hw)->INTFLAG.reg; in hri_osc32kctrl_read_INTFLAG_reg() [all …]
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D | hri_aes_l21.h | 155 return (((Aes *)hw)->INTFLAG.reg & AES_INTFLAG_ENCCMP) >> AES_INTFLAG_ENCCMP_Pos; in hri_aes_get_INTFLAG_ENCCMP_bit() 160 ((Aes *)hw)->INTFLAG.reg = AES_INTFLAG_ENCCMP; in hri_aes_clear_INTFLAG_ENCCMP_bit() 165 return (((Aes *)hw)->INTFLAG.reg & AES_INTFLAG_GFMCMP) >> AES_INTFLAG_GFMCMP_Pos; in hri_aes_get_INTFLAG_GFMCMP_bit() 170 ((Aes *)hw)->INTFLAG.reg = AES_INTFLAG_GFMCMP; in hri_aes_clear_INTFLAG_GFMCMP_bit() 175 return (((Aes *)hw)->INTFLAG.reg & AES_INTFLAG_ENCCMP) >> AES_INTFLAG_ENCCMP_Pos; in hri_aes_get_interrupt_ENCCMP_bit() 180 ((Aes *)hw)->INTFLAG.reg = AES_INTFLAG_ENCCMP; in hri_aes_clear_interrupt_ENCCMP_bit() 185 return (((Aes *)hw)->INTFLAG.reg & AES_INTFLAG_GFMCMP) >> AES_INTFLAG_GFMCMP_Pos; in hri_aes_get_interrupt_GFMCMP_bit() 190 ((Aes *)hw)->INTFLAG.reg = AES_INTFLAG_GFMCMP; in hri_aes_clear_interrupt_GFMCMP_bit() 196 tmp = ((Aes *)hw)->INTFLAG.reg; in hri_aes_get_INTFLAG_reg() 203 return ((Aes *)hw)->INTFLAG.reg; in hri_aes_read_INTFLAG_reg() [all …]
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D | hri_ac_l21.h | 189 return (((Ac *)hw)->INTFLAG.reg & AC_INTFLAG_COMP0) >> AC_INTFLAG_COMP0_Pos; in hri_ac_get_INTFLAG_COMP0_bit() 194 ((Ac *)hw)->INTFLAG.reg = AC_INTFLAG_COMP0; in hri_ac_clear_INTFLAG_COMP0_bit() 199 return (((Ac *)hw)->INTFLAG.reg & AC_INTFLAG_COMP1) >> AC_INTFLAG_COMP1_Pos; in hri_ac_get_INTFLAG_COMP1_bit() 204 ((Ac *)hw)->INTFLAG.reg = AC_INTFLAG_COMP1; in hri_ac_clear_INTFLAG_COMP1_bit() 209 return (((Ac *)hw)->INTFLAG.reg & AC_INTFLAG_WIN0) >> AC_INTFLAG_WIN0_Pos; in hri_ac_get_INTFLAG_WIN0_bit() 214 ((Ac *)hw)->INTFLAG.reg = AC_INTFLAG_WIN0; in hri_ac_clear_INTFLAG_WIN0_bit() 219 return (((Ac *)hw)->INTFLAG.reg & AC_INTFLAG_COMP0) >> AC_INTFLAG_COMP0_Pos; in hri_ac_get_interrupt_COMP0_bit() 224 ((Ac *)hw)->INTFLAG.reg = AC_INTFLAG_COMP0; in hri_ac_clear_interrupt_COMP0_bit() 229 return (((Ac *)hw)->INTFLAG.reg & AC_INTFLAG_COMP1) >> AC_INTFLAG_COMP1_Pos; in hri_ac_get_interrupt_COMP1_bit() 234 ((Ac *)hw)->INTFLAG.reg = AC_INTFLAG_COMP1; in hri_ac_clear_interrupt_COMP1_bit() [all …]
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D | hri_usb_l21.h | 1940 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_HSOF) >> USB_HOST_INTFLAG_HSOF_Pos; in hri_usbhost_get_INTFLAG_HSOF_bit() 1945 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF; in hri_usbhost_clear_INTFLAG_HSOF_bit() 1950 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RST) >> USB_HOST_INTFLAG_RST_Pos; in hri_usbhost_get_INTFLAG_RST_bit() 1955 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST; in hri_usbhost_clear_INTFLAG_RST_bit() 1960 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_WAKEUP) >> USB_HOST_INTFLAG_WAKEUP_Pos; in hri_usbhost_get_INTFLAG_WAKEUP_bit() 1965 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP; in hri_usbhost_clear_INTFLAG_WAKEUP_bit() 1970 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DNRSM) >> USB_HOST_INTFLAG_DNRSM_Pos; in hri_usbhost_get_INTFLAG_DNRSM_bit() 1975 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM; in hri_usbhost_clear_INTFLAG_DNRSM_bit() 1980 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_UPRSM) >> USB_HOST_INTFLAG_UPRSM_Pos; in hri_usbhost_get_INTFLAG_UPRSM_bit() 1985 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM; in hri_usbhost_clear_INTFLAG_UPRSM_bit() [all …]
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D | hri_pm_l21.h | 125 return (((Pm *)hw)->INTFLAG.reg & PM_INTFLAG_PLRDY) >> PM_INTFLAG_PLRDY_Pos; in hri_pm_get_INTFLAG_PLRDY_bit() 130 ((Pm *)hw)->INTFLAG.reg = PM_INTFLAG_PLRDY; in hri_pm_clear_INTFLAG_PLRDY_bit() 135 return (((Pm *)hw)->INTFLAG.reg & PM_INTFLAG_PLRDY) >> PM_INTFLAG_PLRDY_Pos; in hri_pm_get_interrupt_PLRDY_bit() 140 ((Pm *)hw)->INTFLAG.reg = PM_INTFLAG_PLRDY; in hri_pm_clear_interrupt_PLRDY_bit() 146 tmp = ((Pm *)hw)->INTFLAG.reg; in hri_pm_get_INTFLAG_reg() 153 return ((Pm *)hw)->INTFLAG.reg; in hri_pm_read_INTFLAG_reg() 158 ((Pm *)hw)->INTFLAG.reg = mask; in hri_pm_clear_INTFLAG_reg()
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D | hri_tcc_l21.h | 3001 return (((Tcc *)hw)->INTFLAG.reg & TCC_INTFLAG_OVF) >> TCC_INTFLAG_OVF_Pos; in hri_tcc_get_INTFLAG_OVF_bit() 3006 ((Tcc *)hw)->INTFLAG.reg = TCC_INTFLAG_OVF; in hri_tcc_clear_INTFLAG_OVF_bit() 3011 return (((Tcc *)hw)->INTFLAG.reg & TCC_INTFLAG_TRG) >> TCC_INTFLAG_TRG_Pos; in hri_tcc_get_INTFLAG_TRG_bit() 3016 ((Tcc *)hw)->INTFLAG.reg = TCC_INTFLAG_TRG; in hri_tcc_clear_INTFLAG_TRG_bit() 3021 return (((Tcc *)hw)->INTFLAG.reg & TCC_INTFLAG_CNT) >> TCC_INTFLAG_CNT_Pos; in hri_tcc_get_INTFLAG_CNT_bit() 3026 ((Tcc *)hw)->INTFLAG.reg = TCC_INTFLAG_CNT; in hri_tcc_clear_INTFLAG_CNT_bit() 3031 return (((Tcc *)hw)->INTFLAG.reg & TCC_INTFLAG_ERR) >> TCC_INTFLAG_ERR_Pos; in hri_tcc_get_INTFLAG_ERR_bit() 3036 ((Tcc *)hw)->INTFLAG.reg = TCC_INTFLAG_ERR; in hri_tcc_clear_INTFLAG_ERR_bit() 3041 return (((Tcc *)hw)->INTFLAG.reg & TCC_INTFLAG_UFS) >> TCC_INTFLAG_UFS_Pos; in hri_tcc_get_INTFLAG_UFS_bit() 3046 ((Tcc *)hw)->INTFLAG.reg = TCC_INTFLAG_UFS; in hri_tcc_clear_INTFLAG_UFS_bit() [all …]
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D | hri_tc_l21.h | 893 return (((Tc *)hw)->COUNT8.INTFLAG.reg & TC_INTFLAG_OVF) >> TC_INTFLAG_OVF_Pos; in hri_tc_get_INTFLAG_OVF_bit() 898 ((Tc *)hw)->COUNT8.INTFLAG.reg = TC_INTFLAG_OVF; in hri_tc_clear_INTFLAG_OVF_bit() 903 return (((Tc *)hw)->COUNT8.INTFLAG.reg & TC_INTFLAG_ERR) >> TC_INTFLAG_ERR_Pos; in hri_tc_get_INTFLAG_ERR_bit() 908 ((Tc *)hw)->COUNT8.INTFLAG.reg = TC_INTFLAG_ERR; in hri_tc_clear_INTFLAG_ERR_bit() 913 return (((Tc *)hw)->COUNT8.INTFLAG.reg & TC_INTFLAG_MC0) >> TC_INTFLAG_MC0_Pos; in hri_tc_get_INTFLAG_MC0_bit() 918 ((Tc *)hw)->COUNT8.INTFLAG.reg = TC_INTFLAG_MC0; in hri_tc_clear_INTFLAG_MC0_bit() 923 return (((Tc *)hw)->COUNT8.INTFLAG.reg & TC_INTFLAG_MC1) >> TC_INTFLAG_MC1_Pos; in hri_tc_get_INTFLAG_MC1_bit() 928 ((Tc *)hw)->COUNT8.INTFLAG.reg = TC_INTFLAG_MC1; in hri_tc_clear_INTFLAG_MC1_bit() 933 return (((Tc *)hw)->COUNT8.INTFLAG.reg & TC_INTFLAG_OVF) >> TC_INTFLAG_OVF_Pos; in hri_tc_get_interrupt_OVF_bit() 938 ((Tc *)hw)->COUNT8.INTFLAG.reg = TC_INTFLAG_OVF; in hri_tc_clear_interrupt_OVF_bit() [all …]
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D | hri_adc_l21.h | 198 return (((Adc *)hw)->INTFLAG.reg & ADC_INTFLAG_RESRDY) >> ADC_INTFLAG_RESRDY_Pos; in hri_adc_get_INTFLAG_RESRDY_bit() 203 ((Adc *)hw)->INTFLAG.reg = ADC_INTFLAG_RESRDY; in hri_adc_clear_INTFLAG_RESRDY_bit() 208 return (((Adc *)hw)->INTFLAG.reg & ADC_INTFLAG_OVERRUN) >> ADC_INTFLAG_OVERRUN_Pos; in hri_adc_get_INTFLAG_OVERRUN_bit() 213 ((Adc *)hw)->INTFLAG.reg = ADC_INTFLAG_OVERRUN; in hri_adc_clear_INTFLAG_OVERRUN_bit() 218 return (((Adc *)hw)->INTFLAG.reg & ADC_INTFLAG_WINMON) >> ADC_INTFLAG_WINMON_Pos; in hri_adc_get_INTFLAG_WINMON_bit() 223 ((Adc *)hw)->INTFLAG.reg = ADC_INTFLAG_WINMON; in hri_adc_clear_INTFLAG_WINMON_bit() 228 return (((Adc *)hw)->INTFLAG.reg & ADC_INTFLAG_RESRDY) >> ADC_INTFLAG_RESRDY_Pos; in hri_adc_get_interrupt_RESRDY_bit() 233 ((Adc *)hw)->INTFLAG.reg = ADC_INTFLAG_RESRDY; in hri_adc_clear_interrupt_RESRDY_bit() 238 return (((Adc *)hw)->INTFLAG.reg & ADC_INTFLAG_OVERRUN) >> ADC_INTFLAG_OVERRUN_Pos; in hri_adc_get_interrupt_OVERRUN_bit() 243 ((Adc *)hw)->INTFLAG.reg = ADC_INTFLAG_OVERRUN; in hri_adc_clear_interrupt_OVERRUN_bit() [all …]
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D | hri_mclk_l21.h | 130 return (((Mclk *)hw)->INTFLAG.reg & MCLK_INTFLAG_CKRDY) >> MCLK_INTFLAG_CKRDY_Pos; in hri_mclk_get_INTFLAG_CKRDY_bit() 135 ((Mclk *)hw)->INTFLAG.reg = MCLK_INTFLAG_CKRDY; in hri_mclk_clear_INTFLAG_CKRDY_bit() 140 return (((Mclk *)hw)->INTFLAG.reg & MCLK_INTFLAG_CKRDY) >> MCLK_INTFLAG_CKRDY_Pos; in hri_mclk_get_interrupt_CKRDY_bit() 145 ((Mclk *)hw)->INTFLAG.reg = MCLK_INTFLAG_CKRDY; in hri_mclk_clear_interrupt_CKRDY_bit() 151 tmp = ((Mclk *)hw)->INTFLAG.reg; in hri_mclk_get_INTFLAG_reg() 158 return ((Mclk *)hw)->INTFLAG.reg; in hri_mclk_read_INTFLAG_reg() 163 ((Mclk *)hw)->INTFLAG.reg = mask; in hri_mclk_clear_INTFLAG_reg()
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/loramac-node-latest/src/boards/mcu/saml21/saml21b/include/component/ |
D | trng.h | 163 …__IO TRNG_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x0A (R/W 8) Interrupt Flag Statu… member
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D | tc.h | 753 …__IO TC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x0A (R/W 8) Interrupt Flag Statu… member 779 …__IO TC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x0A (R/W 8) Interrupt Flag Statu… member 803 …__IO TC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x0A (R/W 8) Interrupt Flag Statu… member
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D | sercom.h | 1354 …__IO SERCOM_I2CM_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x18 (R/W 8) I2CM Interrupt Flag … member 1376 …__IO SERCOM_I2CS_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x18 (R/W 8) I2CS Interrupt Flag … member 1398 …__IO SERCOM_SPI_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x18 (R/W 8) SPI Interrupt Flag S… member 1423 …__IO SERCOM_USART_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x18 (R/W 8) USART Interrupt Flag… member
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D | osc32kctrl.h | 272 …__IO OSC32KCTRL_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x08 (R/W 32) Interrupt Flag Statu… member
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D | pm.h | 266 …__IO PM_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Statu… member
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D | aes.h | 305 …__IO AES_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x07 (R/W 8) Interrupt Flag Statu… member
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D | wdt.h | 290 …__IO WDT_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x6 (R/W 8) Interrupt Flag Status… member
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