Home
last modified time | relevance | path

Searched refs:TIM_CCMR1_IC2PSC_Pos (Results 1 – 8 of 8) sorted by relevance

/loramac-node-3.7.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h5633 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
5634 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
5636 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
5637 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h5995 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
5996 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
5998 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
5999 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h6154 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
6155 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
6157 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
6158 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h5891 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
5892 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
5894 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
5895 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h5891 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
5892 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
5894 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
5895 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h6715 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
6716 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
6718 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
6719 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h7017 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
7018 #define TIM_CCMR1_IC2PSC_Msk (0x3U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
7020 #define TIM_CCMR1_IC2PSC_0 (0x1U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
7021 #define TIM_CCMR1_IC2PSC_1 (0x2U << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */
/loramac-node-3.7.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h14296 #define TIM_CCMR1_IC2PSC_Pos (10U) macro
14297 #define TIM_CCMR1_IC2PSC_Msk (0x3UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
14299 #define TIM_CCMR1_IC2PSC_0 (0x1UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000400 */
14300 #define TIM_CCMR1_IC2PSC_1 (0x2UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000800 */