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Searched refs:PIN_PA07I_CCL_OUT0 (Results 1 – 11 of 11) sorted by relevance

/loramac-node-3.6.0-3.5.0/src/boards/mcu/saml21/saml21b/include/pio/
Dsaml21e15b.h756 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
758 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21e16b.h756 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
758 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21e17b.h756 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
758 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21e18b.h756 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
758 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21g16b.h1029 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1031 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21g17b.h1029 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1031 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21g18b.h1029 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1031 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21j16b.h1349 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1351 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21j17b.h1349 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1351 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21j18b.h1366 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1368 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)
Dsaml21j18bu.h1349 #define PIN_PA07I_CCL_OUT0 _L(7) /**< \brief CCL signal: OUT0 on PA07 mux I */ macro
1351 #define PINMUX_PA07I_CCL_OUT0 ((PIN_PA07I_CCL_OUT0 << 16) | MUX_PA07I_CCL_OUT0)