Searched refs:Mclk (Results 1 – 13 of 13) sorted by relevance
77 ((Mclk *)hw)->INTENSET.reg = MCLK_INTENSET_CKRDY; in hri_mclk_set_INTEN_CKRDY_bit()82 return (((Mclk *)hw)->INTENSET.reg & MCLK_INTENSET_CKRDY) >> MCLK_INTENSET_CKRDY_Pos; in hri_mclk_get_INTEN_CKRDY_bit()88 ((Mclk *)hw)->INTENCLR.reg = MCLK_INTENSET_CKRDY; in hri_mclk_write_INTEN_CKRDY_bit()90 ((Mclk *)hw)->INTENSET.reg = MCLK_INTENSET_CKRDY; in hri_mclk_write_INTEN_CKRDY_bit()96 ((Mclk *)hw)->INTENCLR.reg = MCLK_INTENSET_CKRDY; in hri_mclk_clear_INTEN_CKRDY_bit()101 ((Mclk *)hw)->INTENSET.reg = mask; in hri_mclk_set_INTEN_reg()107 tmp = ((Mclk *)hw)->INTENSET.reg; in hri_mclk_get_INTEN_reg()114 return ((Mclk *)hw)->INTENSET.reg; in hri_mclk_read_INTEN_reg()119 ((Mclk *)hw)->INTENSET.reg = data; in hri_mclk_write_INTEN_reg()120 ((Mclk *)hw)->INTENCLR.reg = ~data; in hri_mclk_write_INTEN_reg()[all …]
473 #define MCLK ((Mclk *)0x40000400UL) /**< \brief (MCLK) APB Base Address */
483 #define MCLK ((Mclk *)0x40000400UL) /**< \brief (MCLK) APB Base Address */
485 } Mclk; typedef